Abstract: This disclosure describes hardware-based mutexes that employ software process authentication to prevent a software process from releasing the lock of a mutex locked by another software process. For example, systems are described in which a mutex controller receives a request from a process to lock a mutex. The mutex controller locks the mutex, writing a process key and process identifier to one or more hardware registers associated with the mutex. If the mutex controller receives a request to release the lock on the mutex, the mutex controller determines if the key received with the request matches the process key written in the one or more hardware registers of the mutex and, if so, releases the lock on the mutex.

Abstract: Systems, methods, and devices of the various embodiments enable dynamic configuration of a number of display regions of interest (ROIs) associated with safety critical content presented on a display, such as a vehicle display. Various embodiments may enable verification of data integrity for ROIs on a display. Various embodiments may enable the selection of different sets of display ROIs from a plurality of independent sets of display ROIs each associated with its own set of stored integrity check values (ICVs). Various embodiments may enable stored ICVs to be used to verify the data integrity of ROIs on a display. Various embodiments may enable the set of display ROIs and the associated ICVs for each display ROI to be changed after a number of frames have been displayed.

Abstract: This disclosure describes hardware-based mutexes that employ software process authentication to prevent a software process from releasing the lock of a mutex locked by another software process. For example, systems are described in which a mutex controller receives a request from a process to lock a mutex. The mutex controller locks the mutex, writing a process key and process identifier to one or more hardware registers associated with the mutex. If the mutex controller receives a request to release the lock on the mutex, the mutex controller determines if the key received with the request matches the process key written in the one or more hardware registers of the mutex and, if so, releases the lock on the mutex.

Abstract: Certain aspects of the present disclosure generally relate to testing functionality of the display system. An example method generally includes selecting a first data integrity check value, associated with a region of interest (ROI) of an input frame, among a set of data integrity check values stored on a memory device, the data integrity check values are associated with an animation comprising a plurality of frames, and at least one of the frames of the animation corresponds to the input frame; processing, with a display processor, the input frame; calculating a second data integrity check value on the ROI of the input frame after the display processor processes the input frame; comparing, with a comparator, the data integrity check values; and generating, with the comparator, an interrupt if the comparison indicates that the values do not match.

Abstract: Systems, methods, and devices of the various embodiments enable dynamic configuration of a number of display regions of interest (ROIs) associated with safety critical content presented on a display, such as a vehicle display. Various embodiments may enable verification of data integrity for ROIs on a display. Various embodiments may enable the selection of different sets of display ROIs from a plurality of independent sets of display ROIs each associated with its own set of stored integrity check values (ICVs). Various embodiments may enable stored ICVs to be used to verify the data integrity of ROIs on a display. Various embodiments may enable the set of display ROIs and the associated ICVs for each display ROI to be changed after a number of frames have been displayed.

Abstract: A system and a method for error-correction code (“ECC”) error handling is described herein. In one aspect, the system and method may operate an ECC function on raw data. The ECC function may include generating ECC syndrome data by an ECC syndrome data generating module. The ECC syndrome data may be derived from the raw data. The system and a method may further inject a fault based on the ECC syndrome data or the raw data. The system and a method may further determine whether the ECC error detected by the ECC checker corresponds to a malfunction of the ECC function or the fault injected based on the ECC syndrome data or the raw data.

Abstract: Various additional and alternative aspects are described herein. In some aspects, the present disclosure provides a method of testing error-correcting code (ECC) logic. The method includes receiving data for storage in a memory. The method further includes receiving an address indicating a location in the memory to store the data. The method further includes determining if the received address matches at least one of one or more test addresses. The method further includes operating the ECC logic in a normal mode when the received address does not match at least one of the one or more test addresses. The method further includes operating the ECC logic in a test mode when the received address does match at least one of the one or more test addresses.

Abstract: Alternative display options for vehicle telltales are disclosed. In one aspect, a fault condition in a telltale is detected, and the telltale is presented through a secondary display system in the vehicle, potentially bypassing any local control unit for the secondary display system. For example, a video telltale may be presented on an infotainment display after detection of a fault in the original telltale. By presenting the telltale in an alternate display, the operator remains informed of sensor conditions in the automobile and may take remedial action to fix the fault as well as any conditions which trigger a telltale.

Abstract: A system and a method for error-correction code (“ECC”) error handling is described herein. In one aspect, the system and method may operate an ECC function on raw data. The ECC function may include generating ECC syndrome data by an ECC syndrome data generating module. The ECC syndrome data may be derived from the raw data. The system and a method may further inject a fault based on the ECC syndrome data or the raw data. The system and a method may further determine whether the ECC error detected by the ECC checker corresponds to a malfunction of the ECC function or the fault injected based on the ECC syndrome data or the raw data.

Abstract: Methods and systems to broadcast sensor outputs in an automotive environment allow sensors such as cameras to output relatively unprocessed (raw) data to two or more different processing circuits where the processing circuits are located in separate and distinct embedded control units (ECUs). A first one of the two or more different processing circuits processes the raw data for human consumption. A second one of the two or more different processing circuits processes the raw data for machine utilization such as for autonomous driving functions. Such an arrangement allows for greater flexibility in utilization of the data from the sensors without imposing undue latency in the processing stream and without compromising key performance indices for human use and machine use.

Abstract: Alternative display options for vehicle telltales are disclosed. In one aspect, a fault condition in a telltale is detected, and the telltale is presented through a secondary display system in the vehicle, potentially bypassing any local control unit for the secondary display system. For example, a video telltale may be presented on an infotainment display after detection of a fault in the original telltale. By presenting the telltale in an alternate display, the operator remains informed of sensor conditions in the automobile and may take remedial action to fix the fault as well as any conditions which trigger a telltale.

Abstract: Various additional and alternative aspects are described herein. In some aspects, the present disclosure provides a method of testing error-correcting code (ECC) logic. The method includes receiving data for storage in a memory. The method further includes receiving an address indicating a location in the memory to store the data. The method further includes determining if the received address matches at least one of one or more test addresses. The method further includes operating the ECC logic in a normal mode when the received address does not match at least one of the one or more test addresses. The method further includes operating the ECC logic in a test mode when the received address does match at least one of the one or more test addresses.

Abstract: In certain aspects, a system comprises a voltage-droop mitigation circuit configured to monitor voltage droop in a supply voltage supplied to a circuit, and to perform voltage-droop mitigation for the circuit if the monitored voltage droop is equal to or greater than a droop threshold. In one aspect, the system also includes a performance monitor configured to track a number of clock cycles over which the voltage-droop mitigation circuit performs the voltage-droop mitigation within a time duration, and to adjust the droop threshold based on the number of clock cycles. In another aspect, the system also includes a performance monitor configured to track a number of times that the voltage-droop mitigation circuit performs the voltage-droop mitigation within a time duration, and to adjust the droop threshold based on the number of times that the voltage-droop mitigation circuit performs the voltage-droop mitigation within the time duration.

Abstract: In certain aspects, a system comprises a voltage-droop mitigation circuit configured to monitor voltage droop in a supply voltage supplied to a circuit, and to perform voltage-droop mitigation for the circuit if the monitored voltage droop is equal to or greater than a droop threshold. In one aspect, the system also includes a performance monitor configured to track a number of clock cycles over which the voltage-droop mitigation circuit performs the voltage-droop mitigation within a time duration, and to adjust the droop threshold based on the number of clock cycles. In another aspect, the system also includes a performance monitor configured to track a number of times that the voltage-droop mitigation circuit performs the voltage-droop mitigation within a time duration, and to adjust the droop threshold based on the number of times that the voltage-droop mitigation circuit performs the voltage-droop mitigation within the time duration.

Abstract: A method including receiving an indication of a number of active processing units in a computer processor; in response to receiving the indication, determining an appropriate operating voltage margin for the computer processor; reducing an operating frequency of the active processing units in response to receiving the indication; adjusting a power supply to increase or decrease a voltage to the computer processor in accordance with the appropriate operating voltage margin; and increasing the operating frequency of the active processing units in response to an acknowledgment that the power supply has been adjusted.

Abstract: A method including receiving an indication of a number of active processing units in a computer processor; in response to receiving the indication, determining an appropriate operating voltage margin for the computer processor; reducing an operating frequency of the active processing units in response to receiving the indication; adjusting a power supply to increase or decrease a voltage to the computer processor in accordance with the appropriate operating voltage margin; and increasing the operating frequency of the active processing units in response to an acknowledgment that the power supply has been adjusted.

Abstract: An integrated circuit compensates for circuit aging by measuring the aging with an aging sensor and controlling a supply voltage based on the measured aging. The operating environment for the aging sensor can be set to reduce impacts of non-aging effects on the measured aging. For example, the operating environment can use a temperature inversion voltage. An initial aging measurement value which is the difference between an initial aged measurement and an initial unaged measurement can be stored on the integrated circuit. A core power reduction controller can use the measured aging and the stored initial aging measurement value to update a performance-sensor target value and then perform adaptive voltage scaling using the using the updated performance-sensor target value.

Abstract: The systems and method described herein provide efficient (e.g., low power and low area) techniques to track performance in numerous supply domains with heterogeneous circuits that are used in a large system-on-a-chip integrated circuit (SoCs). The heterogeneous circuits can include circuits made with different devices, different cell libraries, and different hard macros that are in different power supply domains. Performance measurements from performance sensors (or process-voltage-temperature (PVT) sensors) that are spread about the SoC are collected and processed to determine voltage levels for each of the supply domains. A single controller can receive can determine voltage levels for a whole SoC. The performance sensors are connected to the controller by a scan chain. The techniques are flexible and can be easily adapted for use in SoCs with different power supply domains and types of circuits.

Abstract: The systems and method described herein provide efficient (e.g., low power and low area) means to track performance in numerous supply domains with heterogeneous circuits that are used in a large system-on-a-chip integrated circuit (SoCs). The heterogeneous circuits can include circuits made with different devices, different cell libraries, and different hard macros that are in different power supply domains. Performance measurements from performance sensors (or process-voltage-temperature (PVT) sensors) that are spread about the SoC are collected and processed to determine voltage levels for each of the supply domains. A single controller can receive can determine voltage levels for a whole SoC. The performance sensors are connected to the controller by a scan chain. The technique is flexible and can be easily adapted for use in SoCs with different power supply domains and types of circuits.