Patents by Inventor Riadh Ben Abdallah

Riadh Ben Abdallah has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Data processing device, chain and method, and corresponding recording medium for dividing a main buffer memory into used space and free space
    Patent number: 8909823
    Abstract: A data processing device includes a memory, a direct memory access controller including a receiving module configured to receive data coming from outside the device and for writing the data in a main buffer memory of the memory, and a processing unit programmed to read and process data written by the receiving module in a work area of the main buffer memory. The main buffer memory is divided between a used space, where the receiving module is configured not to write, and free space, where the receiving module is configured to write. The processing unit is further programmed to define the work area, and the direct memory access controller includes a buffer memory manager configured to free data written in the main buffer memory, by defining a location of this data as a free space, only when this data is outside the work area.
    Type: Grant
    Filed: June 23, 2011
    Date of Patent: December 9, 2014
    Assignees: Commissariat a l'Energie Atomique et aux Energies Alternatives, Institut National de Recherche en Informatique et en Automatique
    Inventors: Riadh Ben Abdallah, Antoine Fraboulet, Jerome Martin, Tanguy Risset
  • DATA PROCESSING DEVICE, CHAIN AND METHOD, AND CORRESPONDING COMPUTER PROGRAM
    Publication number: 20130111079
    Abstract: A data processing device includes a memory, a direct memory access controller including a receiving module configured to receive data coming from outside the device and for writing the data in a main buffer memory of the memory, and a processing unit programmed to read and process data written by the receiving module in a work area of the main buffer memory. The main buffer memory is divided between a used space, where the receiving module is configured not to write, and free space, where the receiving module is configured to write. The processing unit is further programmed to define the work area, and the direct memory access controller includes a buffer memory manager configured to free data written in the main buffer memory, by defining a location of this data as a free space, only when this data is outside the work area.
    Type: Application
    Filed: June 23, 2011
    Publication date: May 2, 2013
    Applicants: INSTITUT NATIONAL DE RECHERCHE EN INFORMATIQUE ET EN AUTOMATIQUE, COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT
    Inventors: Riadh Ben Abdallah, Antoine Fraboulet, Jerome Martin, Tanguy Risset