Abstract: A power circuit with a first transistor, including a first terminal connected to a first node, a second terminal connected to an input node, and a control terminal connected to a first control node, and a second transistor, including a first terminal connected to the first node, a second terminal connected to an output node, and a control terminal connected to a second control node. A third transistor includes a first terminal connected to the first control node, a second terminal connected to a second node, and a control terminal, and a fourth transistor includes a first terminal connected to the output node, a second terminal connected to the second control node, and a control terminal connected to a third node. The power circuit also includes a current limiting circuit coupled between the second node and the third node.

Abstract: Aspects of the disclosure provide for a circuit. In at least some examples, the circuit includes a high-side power transistor, a low-side power transistor, a first transistor, a second transistor, and a third transistor. The high-side transistor is adapted to couple between an input node and a switch node. The low-side transistor is coupled between the switch node and ground. The first transistor is adapted to couple between a first node and the switch node. The second transistor is coupled between the first node and an output node. The third transistor is coupled between the first node and ground.

Abstract: A device includes a buck converter coupled to an input node and an output node, and a linear voltage regulator coupled to the input node and to the output node.

Abstract: A device includes a buck converter coupled to an input node and an output node, and a linear voltage regulator coupled to the input node and to the output node.

Abstract: Aspects of the disclosure provide for a circuit. In at least some examples, the circuit includes a high-side power transistor, a low-side power transistor, a first transistor, a second transistor, and a third transistor. The high-side transistor is adapted to couple between an input node and a switch node. The low-side transistor is coupled between the switch node and ground. The first transistor is adapted to couple between a first node and the switch node. The second transistor is coupled between the first node and an output node. The third transistor is coupled between the first node and ground.

Abstract: A power circuit with a first transistor, including a first terminal connected to a first node, a second terminal connected to an input node, and a control terminal connected to a first control node, and a second transistor, including a first terminal connected to the first node, a second terminal connected to an output node, and a control terminal connected to a second control node. A third transistor includes a first terminal connected to the first control node, a second terminal connected to a second node, and a control terminal, and a fourth transistor includes a first terminal connected to the output node, a second terminal connected to the second control node, and a control terminal connected to a third node. The power circuit also includes a current limiting circuit coupled between the second node and the third node.

Abstract: A powered device receives electrical power through a data transmission cable from a power supplying device that monitors a load on the data transmission cable and turns off the power to the load if the load is outside of a range. The powered device draws a first current at least part of a time during which the powered device is in a low power mode. The powered device is operable during the low power mode to draw a second current. And the powered device increases and decreases the second current to maintain a sum of the first current and the second current, or a level of a current into the powered device, at least at a minimum level for at least a portion of a cycle time.

Abstract: A powered device receives electrical power through a data transmission cable from a power supplying device that monitors a load on the data transmission cable and turns off the power to the load if the load is outside of a range. The powered device draws a first current at least part of a time during which the powered device is in a low power mode. The powered device is operable during the low power mode to draw a second current. And the powered device increases and decreases the second current to maintain a sum of the first current and the second current, or a level of a current into the powered device, at least at a minimum level for at least a portion of a cycle time.