Patents by Inventor Ricardo Allen

Ricardo Allen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • WEAR RESISTANT MINING FE ALLOY MATRIX AND SPINEL CERAMIC COMPOUND COMPOSITE
    Publication number: 20240102132
    Abstract: A metal matrix composite to high tolerate wear as a property has been produced by infiltration casting of a Fe Alloy and a spinel ceramic by using a material design for i) metal transport phenomena conditions, ii) predefined wetting and capillarity and iii) processing child insert/mother casting methodology to produce a final casting in shape and form to meet the needs of a mining end user.
    Type: Application
    Filed: December 3, 2021
    Publication date: March 28, 2024
    Applicant: ME Global Inc.
    Inventors: Aaron James Garland, Joaquin Aguilar Santillan, Antony Pieter, Shayne Allen Berns, Mark Dexter Hines, Ricardo Rodrigo Leiva lllanes, Benjamin Zimmerman, Daniel William Ruffelle
  • Cached dirty bits for context switch consistency checks
    Patent number: 8261028
    Abstract: Embodiments of an invention using cached dirty bits for context switch consistency checks are disclosed. In one embodiment, a processor includes control logic and a cache. The control logic is to cause a consistency check to be performed on a subset of a plurality of state components during a first context switch. The cache is to store a dirty entry for each state component to indicate whether the corresponding state component is included in the subset.
    Type: Grant
    Filed: December 31, 2007
    Date of Patent: September 4, 2012
    Assignee: Intel Corporation
    Inventors: Ki W. Yoon, Ricardo Allen
  • CACHED DIRTY BITS FOR CONTEXT SWITCH CONSISTENCY CHECKS
    Publication number: 20090172298
    Abstract: Embodiments of an invention using cached dirty bits for context switch consistency checks are disclosed. In one embodiment, a processor includes control logic and a cache. The control logic is to cause a consistency check to be performed on a subset of a plurality of state components during a first context switch. The cache is to store a dirty entry for each state component to indicate whether the corresponding state component is included in the subset.
    Type: Application
    Filed: December 31, 2007
    Publication date: July 2, 2009
    Inventors: Ki W. Yoon, Ricardo Allen