Patents by Inventor Ricardo Cotrin Teixeira

Ricardo Cotrin Teixeira has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7977211
    Abstract: The current invention presents a method for thinning wafers. The method uses a two-step process, whereby first the carrier wafer (2) is thinned and in a second step the device wafer (1) is thinned. The method is based on imprinting the combined thickness non-uniformities of carrier (2) and glue layer (3) essentially on the carrier (2), with a resulting low TTV of the wafer (100) after thinning.
    Type: Grant
    Filed: April 8, 2008
    Date of Patent: July 12, 2011
    Assignees: IMEC, Katholieke Universiteit Leuven
    Inventor: Ricardo Cotrin Teixeira
  • Publication number: 20100216308
    Abstract: A method is provided for producing 3D structures in a semiconductor substrate using Deep Reactive Ion Etching (DRIE), comprising at least the steps of: providing a substrate, and then grinding the backside of the substrate in order to achieve a thinned substrate, wherein extrusions and native oxides are left after said grinding step, and then performing a surface treatment selected from the group consisting of a wet etching step and a dry etching step in order to remove at least said native oxides and extrusions on the surface of said backside of the substrate which are causes for the grass formation during subsequent etching, and then performing deep reactive ion etching in order to achieve 3D vias.
    Type: Application
    Filed: February 24, 2010
    Publication date: August 26, 2010
    Applicant: IMEC
    Inventors: Patrick Verdonck, Marc Van Cauwenberghe, Alain Phommahaxay, Ricardo Cotrin Teixeira, Nina Tutunjyan
  • Publication number: 20100112782
    Abstract: The current invention presents a method for thinning wafers. The method uses a two-step process, whereby first the carrier wafer (2) is thinned and in a second step the device wafer (1) is thinned. The method is based on imprinting the combined thickness non-uniformities of carrier (2) and glue layer (3) essentially on the carrier (2), with a resulting low TTV of the wafer (100) after thinning.
    Type: Application
    Filed: April 8, 2008
    Publication date: May 6, 2010
    Applicant: IMEC
    Inventor: Ricardo Cotrin Teixeira