Patents by Inventor Ricardo Espinoza-Ibarra

Ricardo Espinoza-Ibarra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7185214
    Abstract: In a blade-based computer system, the number of loaded blades in the system is determined. Next, an optimal performance configuration for each of the individual blades is determined. The optimal performance configuration is based at least in part on the number of the blades loaded in the chassis and the overall thermal and power envelope. Then an individual frequency for at least one of said individual blades is set creating a more efficiently run system.
    Type: Grant
    Filed: August 12, 2002
    Date of Patent: February 27, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Ricardo Espinoza-Ibarra, Andrew H. Barr
  • Patent number: 7184268
    Abstract: In an electronic system, a method for operating a cooling fan comprises rotating an impeller about a rotational axis and detecting fan failure. The impeller is spatially expanded in response to the detected fan failure whereby airflow through the failed fan is blocked.
    Type: Grant
    Filed: January 10, 2005
    Date of Patent: February 27, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Ricardo Espinoza-Ibarra, Glenn Simon, Christopher Gregory Malone
  • Patent number: 7149913
    Abstract: A frequency manager automatically selects a clock frequency for each device or bus, or for a plurality of devices or buses, in a system, based on various factors and objectives. These factors and objectives can include optimizing performance of the devices without exceeding the system's power/thermal budget. The frequency manager can then control circuits that generate and provide clock signals having the selected frequency(ies) to these devices or buses. For example, in a system that is less than fully populated with devices, embodiments of the invention can select higher clock frequencies than a fully populated system would utilize. Some embodiments of the invention select higher clock frequencies for high-bandwidth devices than for low-bandwidth devices. Other embodiments use information about application programs that will be executed by systems, such as which devices these application programs will frequently access, to select higher clock frequencies for the frequently accessed devices.
    Type: Grant
    Filed: August 22, 2003
    Date of Patent: December 12, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Andrew H. Barr, Ricardo Espinoza-Ibarra
  • Patent number: 7146511
    Abstract: A rack equipment application performance modification system and method is disclosed for providing a convenient and efficient manner to modify performance of rack equipment based upon an application. In one embodiment of the present invention, a rack equipment application performance modification system comprises rack equipment, an application performance modification component, and a communication bus. The rack equipment processes information. The application performance modification component modifies performance of said rack equipment based upon an application. The communication bus communicatively couples the rack equipment and the application performance modification component and the communication bus communicates information between the application performance modification component and the rack equipment.
    Type: Grant
    Filed: October 7, 2003
    Date of Patent: December 5, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Andrew Harvey Barr, Kirk Michael Bresniker, Ricardo Espinoza-Ibarra
  • Patent number: 7146519
    Abstract: A frequency manager automatically selects a clock frequency for each device or bus, or for a plurality of devices or buses, in a system, based on various factors and objectives. These factors and objectives can include optimizing performance of the devices without exceeding the system's power/thermal budget. The frequency manager can then control circuits that generate and provide clock signals having the selected frequency(ies) to these devices or buses. For example, in a system that is less than fully populated with devices, embodiments of the invention can select higher clock frequencies than a fully populated system would utilize. Some embodiments of the invention select higher clock frequencies for high-bandwidth devices than for low-bandwidth devices. Other embodiments use information about application programs that will be executed by systems, such as which devices these application programs will frequently access, to select higher clock frequencies for the frequently accessed devices.
    Type: Grant
    Filed: August 22, 2003
    Date of Patent: December 5, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Andrew H. Barr, Ricardo Espinoza-Ibarra, Kevin M. Somervill
  • Patent number: 7124315
    Abstract: In a system and method for managing the operating frequency of processors in a blade-based computer system, a circuit receives a signal with instructions relating to the desired operating frequency of the processors or blades. The circuit then generates a control signal based upon the specific frequency designated by the user. A frequency synthesizer then processes an input frequency signal and the control signal and outputs an output frequency to be used by at least one processor in the blade-based computer system.
    Type: Grant
    Filed: August 12, 2002
    Date of Patent: October 17, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Ricardo Espinoza-Ibarra, Andrew H. Barr
  • Patent number: 7100056
    Abstract: A method includes modulating a first voltage level of a first processor and a second voltage level of a second processor within a multi-processor computer system. The first processor operates at a first performance level and the second processor operates at a second performance level. The first performance level is higher than said second performance level. A system includes means for modulating a first voltage level of a first processor, which operates at a first performance level, and means for modulating a second voltage level of a second processor, which operates at a second performance level, with a multi-processor computer system.
    Type: Grant
    Filed: August 12, 2002
    Date of Patent: August 29, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Andrew H. Barr, Ricardo Espinoza-Ibarra
  • Patent number: 7080263
    Abstract: A method includes modulating a first voltage level of a first processor and a second voltage level of a second processor within a processor-based system. The first processor processes applications at a first performance level and the second processor processes applications at a second performance level. The first performance level is higher than said second performance level. A system includes means for modulating a first voltage level of a first processor, which processes applications at a first performance level, and means for modulating a second voltage level of a second processor, which processes applications at a second performance level, with a processor-based system.
    Type: Grant
    Filed: August 12, 2002
    Date of Patent: July 18, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Andrew H. Barr, Ricardo Espinoza-Ibarra
  • Publication number: 20060152901
    Abstract: In an electronic system, a method for operating a cooling fan comprises rotating an impeller about a rotational axis and detecting fan failure. The impeller is spatially expanded in response to the detected fan failure whereby airflow through the failed fan is blocked.
    Type: Application
    Filed: January 10, 2005
    Publication date: July 13, 2006
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Ricardo Espinoza-Ibarra, Glenn Simon, Christopher Malone
  • Patent number: 7076671
    Abstract: In a system, method and apparatus for the frequency management of processors in a multi-processor (MP) computer system, a first processor requiring a first level of performance is operated at a specific frequency and consumes a portion of the thermal and power budget. A second processor requiring a second level of performance is operated at a second specific frequency and consumes a portion of the thermal and power budget. The overall power and thermal budget in the multi-processor computer system is maintained under the different operating frequencies.
    Type: Grant
    Filed: August 12, 2002
    Date of Patent: July 11, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Ricardo Espinoza-Ibarra, Andrew H. Barr
  • Patent number: 7058828
    Abstract: In a system, method and apparatus for managing the operating frequency of blades in a blade-based computer system based upon performance requirements, a first blade that requires a specific power allocation is operated at a specific frequency and consumes a portion of the thermal and power budget for the blade-based computer system. A second blade that requires a specific power allocation is operated at a specific frequency and consumes a portion of the thermal and power budget for the blade-based computer system. Additionally, the overall power and thermal budget of the blade-based computer system is maintained.
    Type: Grant
    Filed: August 12, 2002
    Date of Patent: June 6, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Andrew H. Barr, Ricardo Espinoza-Ibarra
  • Patent number: 7055044
    Abstract: A method includes receiving an input signal, which contains instructions for modulating a voltage of a blade, generating a control signal, which is determined by the instructions contained in the input signal, generating an output voltage, and providing the output voltage to the blade. A system includes receiving means for receiving an input signal, first generating means for generating a control signal, second generating means for generating an output voltage, and first providing means for providing the output voltage to the blade.
    Type: Grant
    Filed: August 12, 2002
    Date of Patent: May 30, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Andrew H. Barr, Ricardo Espinoza-Ibarra
  • Patent number: 7054156
    Abstract: A fan rotor system for cooling an electronic system includes a rotor body configured to be rotated by a fan motor and at least one collapsible fan blade mounted on the rotor body for moving cooling air through the electronic system. The at least one collapsible fan blade has a first air driving position, wherein the fan blade moves cooling air in a desired direction for cooling the electronic system, and a second air passage position, wherein the at least one collapsible fan blade is collapsed to allow cooling air to pass the at least one collapsible fan blade with less drag than when the at least one collapsible fan blade is in the first air driving position. The at least one collapsible fan blade is movable between the first air driving position when the rotor body is rotating and the second air passage position when the rotor body is not rotating.
    Type: Grant
    Filed: September 2, 2003
    Date of Patent: May 30, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Ricardo Espinoza-Ibarra, Glenn C. Simon, Christopher G. Malone
  • Patent number: 7039734
    Abstract: A method and method of mastering a serial bus. A serial bus is monitored in order to detect a quiescent period on the bus. Responsive to a detection of a quiescent period, bus signals to a first master device of the serial bus are interrupted, isolating the first bus master from the rest of the bus. Once the first bus master is isolated, a second bus master may operate on the bus, free from potential deleterious interference from the first bus master. When the second bus master is finished operating, it may cause the re-coupling of the bus, restoring the capability of the first bus master to operate.
    Type: Grant
    Filed: September 24, 2002
    Date of Patent: May 2, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Weiyun Sun, Ricardo Espinoza-Ibarra
  • Patent number: 6983386
    Abstract: A method includes modulating a first voltage level of a first blade and a second voltage level of a second blade within a bladed architecture system. The first blade hosts applications that require a first performance level and the second blade hosts applications that require a second performance level. The first performance level is higher than said second performance level. A system includes means for modulating a first voltage level of a first blade, which hosts applications that require a first performance level, and means for modulating a second voltage level of a second blade, which hosts applications that require a second performance level, with a bladed architecture system.
    Type: Grant
    Filed: August 12, 2002
    Date of Patent: January 3, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Andrew H. Barr, Ricardo Espinoza-Ibarra
  • Patent number: 6970054
    Abstract: An apparatus for terminating a transmission line includes a terminating circuit coupled to a first connector portion. A second connector portion mates with the first connector portion. The second connector portion is coupled in electrical contact with the transmission line and includes one or more components, such as pins, that can radiate unwanted electromagnetic interference (EMI) when the transmission line is not terminated. The terminating circuit includes components, such as one or more resistors, that substantially match the impedance of the transmission line. The terminating circuit can also be configured to terminate other conductive lines that can pick up signal noise in a system. The terminating apparatus can be utilized on operational boards that plug into devices such as backplanes or mid-planes. Alternatively, the terminating circuit can be included on a null device or built into the first connector portion.
    Type: Grant
    Filed: October 2, 2002
    Date of Patent: November 29, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Andrew Michael Cherniski, Ricardo Espinoza-Ibarra, Andrew Harvey Barr
  • Patent number: 6961242
    Abstract: An electronic system has independently coolable first and second zones. The electronic system includes a first zone having a first zone fan and a plurality of first zone connectors for connecting electronic modules and a second zone having a second fan zone and a plurality of second zone connectors for connecting electronic modules. A module manager is also provided for communicating with the first and second zone connectors and with the first and second zone fans. The module manager can independently control the speed of the first and second zone fans based upon operational parameters received from the first and second zone connectors.
    Type: Grant
    Filed: July 31, 2003
    Date of Patent: November 1, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Ricardo Espinoza-Ibarra, Andrew H. Barr
  • Publication number: 20050235137
    Abstract: A rack equipment capacity control system and method is presented. In one embodiment of the present invention, a capacity demand plan rack equipment control method is utilized to control operation of rack equipment. A rack equipment capacity alteration request is received. An analysis of the rack equipment capacity alteration request is performed. Performance of the rack equipment is changed in accordance with the analysis of the rack equipment capacity alteration request.
    Type: Application
    Filed: April 20, 2004
    Publication date: October 20, 2005
    Inventors: Andrew Barr, Kirk Bresniker, Ricardo Espinoza-Ibarra
  • Patent number: 6948043
    Abstract: A method of optimizing performance of a memory subsystem in a computer system. This method including the step of informing the computer system of what type of memory module loading is present in the memory subsystem. The method also includes operating the memory subsystem at a first frequency that is at a chosen ratio to a second frequency at which a frontside bus (FSB) operates. Further, the method includes optimizing the performance of the memory subsystem by changing the ratio.
    Type: Grant
    Filed: August 12, 2002
    Date of Patent: September 20, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Andrew H. Barr, Ricardo Espinoza-Ibarra
  • Publication number: 20050203761
    Abstract: A rack equipment power pricing plan control system and method is presented. In one embodiment of the present invention, a power pricing plan rack equipment control method is utilized to control operation of rack equipment. A power pricing plan for operating the rack equipment is established. The rack equipment is operated in accordance with the power pricing plan.
    Type: Application
    Filed: March 15, 2004
    Publication date: September 15, 2005
    Inventors: Andrew Barr, Kirk Bresniker, Ricardo Espinoza-Ibarra