Patents by Inventor Riccardo Miglierina

Riccardo Miglierina has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11150279
    Abstract: A circuit includes a switching circuit including a first switch and a second switch. A current sensing circuit is coupled to the switching circuit to sense a first current through the first switch and to generate a first sensed current signal based on the sensed first current, and configured to sense a second current through the second switch and to generate a second sensed current signal based on the sensed second current. An output circuit is coupled to the current sensing circuit and is configured to generate a failure signal based on the first sensed current signal and the second sensed current signal.
    Type: Grant
    Filed: August 28, 2019
    Date of Patent: October 19, 2021
    Assignee: STMicroelectronics S.r.l.
    Inventors: Vanni Poletto, Riccardo Miglierina, Antonio Davide Leone, Sergio Lecce
  • Publication number: 20190383861
    Abstract: A circuit includes a switching circuit including a first switch and a second switch. A current sensing circuit is coupled to the switching circuit to sense a first current through the first switch and to generate a first sensed current signal based on the sensed first current, and configured to sense a second current through the second switch and to generate a second sensed current signal based on the sensed second current. An output circuit is coupled to the current sensing circuit and is configured to generate a failure signal based on the first sensed current signal and the second sensed current signal.
    Type: Application
    Filed: August 28, 2019
    Publication date: December 19, 2019
    Inventors: Vanni Poletto, Riccardo Miglierina, Antonio Davide Leone, Sergio Lecce
  • Patent number: 10444264
    Abstract: A device measures the current in an inductive load using two separate current-measuring paths to detect the current in the inductive load. The inductive load is connected between first and second nodes, and the first node connected to a first voltage. The device includes first and second transistors cascaded together between the first node and a third node that is connected to a second voltage. First and second sense amplifiers measure the current in the inductive load. The first and second sense amplifiers are connected to at least one terminal of the first and second transistors. Two blocks sample and hold signals from the first and second sense amplifiers, which represent, respectively, the currents in the two separate current-measuring paths. The two currents are subtracted in a comparison node for generating an error signal that is compared with a predefined window and if outside the window a failure signal is generated.
    Type: Grant
    Filed: January 30, 2019
    Date of Patent: October 15, 2019
    Assignee: STMicroelectronics S.r.l.
    Inventors: Vanni Poletto, Riccardo Miglierina, Antonio Davide Leone, Sergio Lecce
  • Publication number: 20190162759
    Abstract: A device measures the current in an inductive load using two separate current-measuring paths to detect the current in the inductive load. The inductive load is connected between first and second nodes, and the first node connected to a first voltage. The device includes first and second transistors cascaded together between the first node and a third node that is connected to a second voltage. First and second sense amplifiers measure the current in the inductive load. The first and second sense amplifiers are connected to at least one terminal of the first and second transistors. Two blocks sample and hold signals from the first and second sense amplifiers, which represent, respectively, the currents in the two separate current-measuring paths. The two currents are subtracted in a comparison node for generating an error signal that is compared with a predefined window and if outside the window a failure signal is generated.
    Type: Application
    Filed: January 30, 2019
    Publication date: May 30, 2019
    Inventors: Vanni Poletto, Riccardo Miglierina, Antonio Davide Leone, Sergio Lecce
  • Patent number: 10215782
    Abstract: A device measures the current in an inductive load using two separate current-measuring paths to detect the current in the inductive load. The inductive load is connected between first and second nodes, and the first node connected to a first voltage. The device includes first and second transistors cascaded together between the first node and a third node that is connected to a second voltage. First and second sense amplifiers measure the current in the inductive load. The first and second sense amplifiers are connected to at least one terminal of the first and second transistors. Two blocks sample and hold signals from the first and second sense amplifiers, which represent, respectively, the currents in the two separate current-measuring paths. The two currents are subtracted in a comparison node for generating an error signal that is compared with a predefined window and if outside the window a failure signal is generated.
    Type: Grant
    Filed: December 7, 2016
    Date of Patent: February 26, 2019
    Assignee: STMicroelectronics S.R.L.
    Inventors: Vanni Poletto, Riccardo Miglierina, Antonio Davide Leone, Sergio Lecce
  • Publication number: 20170322240
    Abstract: A device measures the current in an inductive load using two separate current-measuring paths to detect the current in the inductive load. The inductive load is connected between first and second nodes, and the first node connected to a first voltage. The device includes first and second transistors cascaded together between the first node and a third node that is connected to a second voltage. First and second sense amplifiers measure the current in the inductive load. The first and second sense amplifiers are connected to at least one terminal of the first and second transistors. Two blocks sample and hold signals from the first and second sense amplifiers, which represent, respectively, the currents in the two separate current-measuring paths. The two currents are subtracted in a comparison node for generating an error signal that is compared with a predefined window and if outside the window a failure signal is generated.
    Type: Application
    Filed: December 7, 2016
    Publication date: November 9, 2017
    Inventors: Vanni Poletto, Riccardo Miglierina, Antonio Davide Leone, Sergio Lecce