Abstract: A version for each of a plurality of object files in a computer program is verified by identifying a version of an object file of the plurality of object files in the computer program and comparing the identified version to an initial version. In response to the identified version being different than the initial version, an alert is generated.

Abstract: One embodiment of the invention involves a data structure that is stored on a computer-readable medium comprising a sorted portion that contains a plurality of entries that are sorted into an order, an unsorted portion that contains a plurality of entries that have not been sorted, and a boundary that separates the sorted portion and the unsorted portion. The sorted portion of the data structure may be searched with O(logN) performance while an entry is added to the unsorted portion.

Abstract: A method and system create and use a generic container as a data structure used in a software program. A selected data structure may be specified at start-up time or run-time using a mapping table that tracks the specified data structures for each generic container used by the program. Existing data structures are abstracted to a generic interface for use with the container. The program interacts with the generic container using the generic interface, which allows the container to add, delete, and look up data stored in the container and to retrieve a key used by the container. A program uses an object factory to create an instance of a generic container having the generic interface. At run-time, the object factory refers to the mapping table to determine which specific data structure is used for each generic container.

Abstract: A methodology for translating multiple bit conditional expressions of a non-Verilog hardware description language (HDL) program, not readily recognized by Verilog HDL, which can then be used to realize a logic circuit design embodied by the non-Verilog HDL program. Conditional IF expressions occurring within the HDL program that are not recognized by Verilog HDL are processed so that they can be accordingly translated to Verilog HDL syntax. If the conditional IF expression is a multiple-bit expression, a binary operator statement having bit-wise binary operators, including two AND operators, one OR operator, and one NOT operator, that is equivalent to the conditional IF expression is created.

Abstract: A version for each of a plurality of object files in a computer program is verified by identifying a version of an object file of the plurality of object files in the computer program and comparing the identified version to an initial version. In response to the identified version being different than the initial version, an alert is generated.