Abstract: A force detector and method for using the same includes a movable lens having a spherical surface; a cantilever below the movable lens; a laser above the movable lens configured to emit a beam of light through the movable lens, such that light reflects from the spherical surface and the cantilever; a camera configured to capture images of interference rings produced by the light reflected from the spherical surface and the light reflected from the cantilever; and a processor configured to determine a force between the movable lens and the cantilever based on a change in phase of the interference rings.

Abstract: Aspects relate to an integrated system that is electrically powered. The integrated system includes a circuit board and a photovoltaic device. The circuit board includes one or more on-board electronic components and an upper surface configured as a substrate. The photovoltaic device is integrally deposited on the upper surface of the circuit board and electrically connected to the one or more on-board electronic components, wherein the upper surface of the circuit board is a photovoltaic device substrate.

Abstract: Kesterite-based homojunction photovoltaic devices are provided. The photovoltaic devices include a p-type semiconductor layer including a copper-zinc-tin containing chalcogenide compound and an n-type semiconductor layer including a silver-zinc-tin containing chalcogenide compound having a crystalline structure the same as a crystalline structure the copper-zinc-tin containing chalcogenide compound.

Abstract: A hybrid vapor phase-solution phase CZT(S,Se) growth technique is provided. In one aspect, a method of forming a kesterite absorber material on a substrate includes the steps of: depositing a layer of a first kesterite material on the substrate using a vapor phase deposition process, wherein the first kesterite material includes Cu, Zn, Sn, and at least one of S and Se; annealing the first kesterite material to crystallize the first kesterite material; and depositing a layer of a second kesterite material on a side of the first kesterite material opposite the substrate using a solution phase deposition process, wherein the second kesterite material includes Cu, Zn, Sn, and at least one of S and Se, wherein the first kesterite material and the second kesterite material form a multi-layer stack of the absorber material on the substrate. A photovoltaic device and method of formation thereof are also provided.

Abstract: A photovoltaic device includes a first contact and a hybrid absorber layer. The hybrid absorber layer includes a chalcogenide layer and a semiconductor layer in contact with the chalcogenide layer. A buffer layer is formed on the absorber layer, and a transparent conductive contact layer is formed on the buffer layer.

Abstract: A method for texturing silicon includes loading a silicon wafer into a vacuum chamber, heating the silicon wafer and thermal cracking a gas to generate cracked sulfur species. The silicon wafer is exposed to the cracked sulfur species for a time duration in accordance with a texture characteristic needed for a surface of the silicon wafer.

Abstract: A method for texturing silicon includes loading a silicon wafer into a vacuum chamber, heating the silicon wafer and thermal cracking a gas to generate cracked sulfur species. The silicon wafer is exposed to the cracked sulfur species for a time duration in accordance with a texture characteristic needed for a surface of the silicon wafer.

Abstract: A photovoltaic device includes a first contact and a hybrid absorber layer. The hybrid absorber layer includes a chalcogenide layer and a semiconductor layer in contact with the chalcogenide layer. A buffer layer is formed on the absorber layer, and a transparent conductive contact layer is formed on the buffer layer.

Abstract: A hybrid vapor phase-solution phase CZT(S,Se) growth technique is provided. In one aspect, a method of forming a kesterite absorber material on a substrate includes the steps of: depositing a layer of a first kesterite material on the substrate using a vapor phase deposition process, wherein the first kesterite material includes Cu, Zn, Sn, and at least one of S and Se; annealing the first kesterite material to crystallize the first kesterite material; and depositing a layer of a second kesterite material on a side of the first kesterite material opposite the substrate using a solution phase deposition process, wherein the second kesterite material includes Cu, Zn, Sn, and at least one of S and Se, wherein the first kesterite material and the second kesterite material form a multi-layer stack of the absorber material on the substrate. A photovoltaic device and method of formation thereof are also provided.

Abstract: According to embodiments described in the specification, a pump system is provided for use in a body of fluid having a shore. The pump system includes: a pump support; and a discharge pipe coupled to the pump support at a first end and to the shore at a second end, the discharge pipe including at least one segment of a first material and at least one segment of a second material, and having an expanded position for increasing a distance between the first and second ends, and a collapsed position for reducing the distance between the first and second ends. The discharge pipe is configured for accommodating lateral forces applied to the pump system by transitioning between the expanded and collapsed positions in response to the lateral forces.

Abstract: A method of minimizing the deposition of debris onto a sample being ablated. The method comprises: 1) reducing a laser pulse energy to approximately a threshold level for ablation; 2) focusing the energy using an immersion object lens having a final element and 3) ablating a region of the sample using a multitude of laser pulses, each pulse being sufficiently separated in time to reduce a concentration of ablation products in a gas phase.

Abstract: A gate stack for a transistor is formed by a process including forming a high dielectric constant layer on a semiconductor layer. A metal layer is formed on the high dielectric constant layer. A silicon containing layer is formed over the metal layer. An oxidized layer incidentally forms during the silicon containing layer formation and resides on the metal layer beneath the silicon containing layer. The silicon containing layer is removed. The oxidized layer residing on the metal layer is removed after removing the silicon containing layer.

Abstract: According to embodiments described in the specification, a pumping system for use in a tailings pond is provided. The pumping system comprises a pump support and at least one mooring element coupled to the pump support. The at least one mooring element has an extended position for fixing the pump support to a bed of the tailings pond, and a retracted position for permitting movement of the pump support towards a shore of the tailings pond. The at least one mooring element is configured for transitioning from the extended position to the retracted position when a distance from the shore to the pump support exceeds a threshold as a result of a change to tailings pond geometry, and for returning to the extended position following movement of the pump support to reduce the distance below the threshold.

Abstract: A gate stack for a transistor is formed by a process including forming a high dielectric constant layer on a semiconductor layer. A metal layer is formed on the high dielectric constant layer. A silicon containing layer is formed over the metal layer. An oxidized layer incidentally forms during the silicon containing layer formation and resides on the metal layer beneath the silicon containing layer. The silicon containing layer is removed. The oxidized layer residing on the metal layer is removed after removing the silicon containing layer.

Abstract: A photovoltaic device includes a first contact and a hybrid absorber layer. The hybrid absorber layer includes a chalcogenide layer and a semiconductor layer in contact with the chalcogenide layer. A buffer layer is formed on the absorber layer, and a transparent conductive contact layer is formed on the buffer layer.

Abstract: A light pipe that can be employed for a Concentrator Photo-Voltaic (CPV) system is provided. The light pipe homogenizes light by diffusion and/or refraction, and can be embodied in a structure that has a low aspect ratio. The diffusion and/or refraction can be effected by concave or convex surfaces of a transparent medium that forms a body of the light pipe, by light diffracting particles, and/or by a diffracting surface. Optionally, multiple transparent media can be employed with a refracting and/or diffracting interface therebetween. The reduced aspect ratio of the light pipe can improve reliability of mechanical alignment in the CPV system as well as reducing the cost of manufacturing and/or aligning the light pipe within the CPV system.

Abstract: A non-transitory computer readable medium encoded with a program for fabricating a gate stack for a transistor is disclosed. The program includes instructions configured to perform a method. The method includes forming a high dielectric constant layer on a semiconductor layer. A metal layer is formed on the high dielectric constant layer. A silicon containing layer is formed over the metal layer. An oxidized layer incidentally forms during the silicon containing layer formation and resides on the metal layer beneath the silicon containing layer. The silicon containing layer is removed. The oxidized layer residing on the metal layer is removed after removing the silicon containing layer.

Abstract: A nanoporous templating substrate, which is an anodically oxidized alumina (AAO) substrate, is employed to form a pseudocapacitor having high stored energy density. A pseudocapacitive material is deposited conformally along the sidewalls of the AAO substrate by atomic layer deposition, chemical vapor deposition), and/or electrochemical deposition employing a nucleation layer. The thickness of the pseudocapacitive material on the walls can be precisely controlled in the deposition process. The AAO is etched to form an array of nanotubes of the PC material that are cylindrical and structurally robust with cavities therein. Because the AAO substrate that acts as scaffolding is removed, only the active PC material is left behind, thereby maximizing the energy per mass. In addition, nanotubes may be de-anchored from a substrate so that free-standing nanotubes having randomized orientations may be deposited on a conductive substrate to form an electrode of a pseudocapacitor.

Abstract: A non-transitory computer readable medium encoded with a program for fabricating a gate stack for a transistor is disclosed. The program includes instructions configured to perform a method. The method includes forming a high dielectric constant layer on a semiconductor layer. A metal layer is formed on the high dielectric constant layer. A silicon containing layer is formed over the metal layer. An oxidized layer incidentally forms during the silicon containing layer formation and resides on the metal layer beneath the silicon containing layer. The silicon containing layer is removed. The oxidized layer residing on the metal layer is removed after removing the silicon containing layer.

Abstract: A gate stack for a transistor is formed by a process including forming a high dielectric constant layer on a semiconductor layer. A metal layer is formed on the high dielectric constant layer. A silicon containing layer is formed over the metal layer. An oxidized layer incidentally forms during the silicon containing layer formation and resides on the metal layer beneath the silicon containing layer. The silicon containing layer is removed. The oxidized layer residing on the metal layer is removed after removing the silicon containing layer.