Patents by Inventor Richard A. Keaney
Richard A. Keaney has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7849391Abstract: An apparatus, a carrier medium storing instructions to implement a method, and a method in a node of a wireless network able to receive packets that exactly or substantially conform to a wireless network standard according to which each packet includes a header having bits that have respective correct values in the case that the packet exactly conforms to the standard. The method includes receiving a start-of-packet (SOP) trigger that indicates that a packet may have been received, checking one or more bits in the header to determine whether or not they have their respective correct values, and continuing to process the packet in the case that the checking indicates that the checked bits have their respective correct values. In one implementation, the header includes a first field modulated at a known rate that has one or more reserved bit locations, and a second field modulated at a data rate indicated in the first field.Type: GrantFiled: July 17, 2008Date of Patent: December 7, 2010Assignee: Cisco Technology, Inc.Inventors: Richard A. Keaney, John D. O'Sullivan, Brian Hart, Philip J. Ryan, Kurt A. Lumbatis, Kevin C. H. Wong
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Publication number: 20080273536Abstract: An apparatus, a carrier medium storing instructions to implement a method, and a method in a node of a wireless network able to receive packets that exactly or substantially conform to a wireless network standard according to which each packet includes a header having bits that have respective correct values in the case that the packet exactly conforms to the standard. The method includes receiving a start-of-packet (SOP) trigger that indicates that a packet may have been received, checking one or more bits in the header to determine whether or not they have their respective correct values, and continuing to process the packet in the case that the checking indicates that the checked bits have their respective correct values. In one implementation, the header includes a first field modulated at a known rate that has one or more reserved bit locations, and a second field modulated at a data rate indicated in the first field.Type: ApplicationFiled: July 17, 2008Publication date: November 6, 2008Inventors: Richard A. Keaney, John D. O'Sullivan, Brian Hart, Philip J. Ryan, Kurt A. Lumbatis, Kevin C. H. Wong
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Patent number: 7426249Abstract: A configurable Viterbi decoder to decode a coded signal for inclusion in a radio receiver for implementing the physical layer receiving function (PHY) of a wireless data network. The decoder includes a branch metric generator with an input to the coded signal, an ACS subsystem coupled to the branch metric generator, and a survivor memory unit coupled to the ACS subsystem. The decoder includes a plurality of outputs each providing a decoded version of the input signal decoded to a distinct decision depth such that the Viterbi decoder is programmable to decode the signal to one of a plurality of decision depths.Type: GrantFiled: March 31, 2006Date of Patent: September 16, 2008Assignee: Cisco Technology, Inc.Inventors: Richard A. Keaney, Thomas McDermott, Philip J. Ryan
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Patent number: 7415661Abstract: An apparatus, a carrier medium storing instructions to implement a method, and a method in a node of a wireless network able to receive packets that exactly or substantially conform to a wireless network standard according to which each packet includes a header having bits that have respective correct values in the case that the packet exactly conforms to the standard. The method includes receiving a start-of-packet (SOP) trigger that indicates that a packet may have been received, checking one or more bits in the header to determine whether or not they have their respective correct values, and continuing to process the packet in the case that the checking indicates that the checked bits have their respective correct values. In one implementation, the header includes a first field modulated at a known rate that has one or more reserved bit locations, and a second field modulated at a data rate indicated in the first field.Type: GrantFiled: April 25, 2006Date of Patent: August 19, 2008Assignee: Cisco Technology, Inc.Inventors: Richard A. Keaney, John D. O'Sullivan, Brian Hart, Philip J. Ryan, Kurt A. Lumbatis, Kevin C. H. Wong
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Patent number: 7164651Abstract: A wireless computer data network includes several untethered mobile units that make ad-hoc data connections with an Internet-connected base station using the IEEE-802.11a standard. Each unit includes a radio transceiver fully integrated on a single semiconductor chip. The receiver portion is a double-conversion superheterodyne type, and shares the same intermediate and local oscillator frequencies with a two-stage up-conversion transmitter. Two on-chip synthesizers that each include a voltage-controlled oscillator and phase-locked loop can be operated independently for each conversion stage, or operated in offset mode. External reference frequencies can be injected for voltage-controlled oscillator and phase-locked loop testing, chip characterization, and automatic compensation modeling. Each mobile and base unit can be outfitted with transmit/receive antenna transfer switches, RF-power amplifiers, and low-noise receiver amplifiers to increase operating range.Type: GrantFiled: April 25, 2006Date of Patent: January 16, 2007Assignee: Cisco Systems Wireless Networking (Australia) Pty LimitedInventors: Neil Weste, Andrew Adams, Philip Ryan, John O'Sullivan, David J. Skellern, Richard Keaney
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Publication number: 20060194614Abstract: A wireless computer data network includes several untethered mobile units that make ad-hoc data connections with an Internet-connected base station using the IEEE-802.11a standard. Each unit includes a radio transceiver fully integrated on a single semiconductor chip. The receiver portion is a double-conversion superheterodyne type, and shares the same intermediate and local oscillator frequencies with a two-stage up-conversion transmitter. Two on-chip synthesizers that each include a voltage-controlled oscillator and phase-locked loop can be operated independently for each conversion stage, or operated in offset mode. External reference frequencies can be injected for voltage-controlled oscillator and phase-locked loop testing, chip characterization, and automatic compensation modeling. Each mobile and base unit can be outfitted with transmit/receive antenna transfer switches, RF-power amplifiers, and low-noise receiver amplifiers to increase operating range.Type: ApplicationFiled: April 25, 2006Publication date: August 31, 2006Inventors: Neil Weste, Andrew Adams, Philip Ryan, John O'Sullivan, David Skellern, Richard Keaney
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Publication number: 20060193277Abstract: An apparatus, a carrier medium storing instructions to implement a method, and a method in a node of a wireless network able to receive packets that exactly or substantially conform to a wireless network standard according to which each packet includes a header having bits that have respective correct values in the case that the packet exactly conforms to the standard. The method includes receiving a start-of-packet (SOP) trigger that indicates that a packet may have been received, checking one or more bits in the header to determine whether or not they have their respective correct values, and continuing to process the packet in the case that the checking indicates that the checked bits have their respective correct values. In one implementation, the header includes a first field modulated at a known rate that has one or more reserved bit locations, and a second field modulated at a data rate indicated in the first field.Type: ApplicationFiled: April 25, 2006Publication date: August 31, 2006Inventors: Richard Keaney, John O'Sullivan, Brian Hart, Philip Ryan, Kurt Lumbatis, Kevin Wong
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Publication number: 20060176968Abstract: A configurable Viterbi decoder to decode a coded signal for inclusion in a radio receiver for implementing the physical layer receiving function (PHY) of a wireless data network. The decoder includes a branch metric generator with an input to the coded signal, an ACS subsystem coupled to the branch metric generator, and a survivor memory unit coupled to the ACS subsystem. The decoder includes a plurality of outputs each providing a decoded version of the input signal decoded to a distinct decision depth such that the Viterbi decoder is programmable to decode the signal to one of a plurality of decision depths.Type: ApplicationFiled: March 31, 2006Publication date: August 10, 2006Inventors: Richard Keaney, Thomas McDermott, Philip Ryan
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Patent number: 7062703Abstract: An apparatus, a carrier medium storing instructions to implement a method, and a method in a node of a wireless network able to receive packets that exactly or substantially conform to a wireless network standard according to which each packet includes a header having bits that have respective correct values in the case that the packet exactly conforms to the standard. The method includes receiving a start-of-packet (SOP) trigger that indicates that a packet may have been received, checking one or more bits in the header to determine whether or not they have their respective correct values, and continuing to process the packet in the case that the checking indicates that the checked bits have their respective correct values. In one implementation, the header includes a first field modulated at a known rate that has one or more reserved bit locations, and a second field modulated at a data rate indicated in the first field.Type: GrantFiled: July 28, 2003Date of Patent: June 13, 2006Assignee: Cisco Technology, IncInventors: Richard A. Keaney, John D. O'Sullivan, Brian Hart, Philip J. Ryan, Kurt A. Lumbatis, Kevin C. H. Wong
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Patent number: 7061855Abstract: A wireless computer data network includes several untethered mobile units that make ad-hoc data connections with an Internet-connected base station using the IEEE-802.11a standard. Each unit includes a radio transceiver fully integrated on a single semiconductor chip. The receiver portion is a double-conversion superheterodyne type, and shares the same intermediate and local oscillator frequencies with a two-stage up-conversion transmitter. Two on-chip synthesizers that each include a voltage-controlled oscillator and phase-locked loop can be operated independently for each conversion stage, or operated in offset mode. External reference frequencies can be injected for voltage-controlled oscillator and phase-locked loop testing, chip characterization, and automatic compensation modeling. Each mobile and base unit can be outfitted with transmit/receive antenna transfer switches, RF-power amplifiers, and low-noise receiver amplifiers to increase operating range.Type: GrantFiled: June 27, 2005Date of Patent: June 13, 2006Assignee: Cisco Systems Wireless Networking (Australia) Pty LimitedInventors: Neil Weste, Andrew Adams, Philip Ryan, John O'Sullivan, David J. Skellern, Richard Keaney
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Patent number: 7046746Abstract: A configurable Viterbi decoder to decode a coded signal for inclusion in a radio receiver for implementing the physical layer receiving function (PHY) of a wireless data network. The decoder includes a branch metric generator with an input to the coded signal, an ACS subsystem coupled to the branch metric generator, and a survivor memory unit coupled to the ACS subsystem. The decoder includes a plurality of outputs each providing a decoded version of the input signal decoded to a distinct decision depth such that the Viterbi decoder is programmable to decode the signal to one of a plurality of decision depths.Type: GrantFiled: March 11, 2002Date of Patent: May 16, 2006Assignee: Cisco Systems Wireless Networking (Australia) Pty LimitedInventors: Richard A. Keaney, Thomas McDermott, Philip J. Ryan
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Publication number: 20050237924Abstract: A wireless computer data network includes several untethered mobile units that make ad-hoc data connections with an Internet-connected base station using the IEEE-802.11a standard. Each unit includes a radio transceiver fully integrated on a single semiconductor chip. The receiver portion is a double-conversion superheterodyne type, and shares the same intermediate and local oscillator frequencies with a two-stage up-conversion transmitter. Two on-chip synthesizers that each include a voltage-controlled oscillator and phase-locked loop can be operated independently for each conversion stage, or operated in offset mode. External reference frequencies can be injected for voltage-controlled oscillator and phase-locked loop testing, chip characterization, and automatic compensation modeling. Each mobile and base unit can be outfitted with transmit/receive antenna transfer switches, RF-power amplifiers, and low-noise receiver amplifiers to increase operating range.Type: ApplicationFiled: June 27, 2005Publication date: October 27, 2005Inventors: Neil Weste, Andrew Adams, Philip Ryan, John O'Sullivan, David Skellern, Richard Keaney
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Patent number: 6944121Abstract: A wireless computer data network includes several untethered mobile units that make ad-hoc data connections with an Internet-connected base station using the IEEE-802.11a standard. Each unit includes a radio transceiver fully integrated on a single semiconductor chip. The receiver portion is a double-conversion superheterodyne type, and shares the same intermediate and local oscillator frequencies with a two-stage up-conversion transmitter. Two on-chip synthesizers that each include a voltage-controlled oscillator and phase-locked loop can be operated independently for each conversion stage, or operated in offset mode. External reference frequencies can be injected for voltage-controlled oscillator and phase-locked loop testing, chip characterization, and automatic compensation modeling. Each mobile and base unit can be outfitted with transmit/receive antenna transfer switches, RF-power amplifiers, and low-noise receiver amplifiers to increase operating range.Type: GrantFiled: June 8, 2001Date of Patent: September 13, 2005Assignee: Cisco Systems Wireless Networking (Australia) Pty LimitedInventors: Neil Weste, Andrew Adams, Philip Ryan, John O'Sullivan, David J. Skellern, Richard Keaney