Abstract: A data transfer network uses an I/O subsystem to support a main host computer in managing data transfers to and from remote data terminals. The I/O subsystem may constitute one or more units called a Line Support Processor. The Line Support Processor uses internal processor means to control a plurality of line adapters each of which has a data-comm line to a data set or data terminal. Control operations by said internal processor permit selected line adapters to operate selected types of protocols using synchronous or asynchronous transmission. Data communication information and commands in high level language data are loaded into auxiliary memories in the internal processor means and into each line adapter where the internal processor means acts to convert this language data into usable protocols.

Abstract: An I/O subsystem, controlled by a microprocessor, includes a plurality of line adapters, each of which provides data-comm lines to remote terminal units. Each line adapter has a USART control unit and a timer unit having internal registers which can be written-into or read-out from by said microprocessor which uses means to select a particular line adapter to access a particular register in the USART unit or the timer unit.

Abstract: In a multiple line adapter organization for a data-comm network, each line adapter providing a receiver-transmitter (USART) and timer means which can interrupt and request service from an associated microprocessor. The microprocessor uses Read operators which can then identify the unit requesting service and identify the type of line operations to be used by that particular line adapter.

Abstract: A data-comm network uses multiple line adapters for controlling communication with various data terminals. Each line adapter, and also a data-link interface unit, has its own RAM memory means for buffering of data. An associated microprocessor permits selection of any particular line adapter and its RAM memory means or selection of the data-link-interface unit RAM memory means.

Abstract: A line adapter system for handling byte-oriented data transfers between remote data terminals and I/O subsystem. Working in conjunction with a controlling microprocessor, the line adapter provides input output means for regulating the baud rate of transmission to/from a remote terminal and for the timing and protocols required for both synchronous and asynchronous data transmission. The microprocessor may address and control various of the timing elements and byte to bit transfer means of the input/output circuit means. Likewise, each of the elements of the input/output circuit means may request service from the microprocessor for further detailed instructions.

Abstract: Data transfers between remote data sets, data terminals and a main host computer are controlled by a peripheral-controller designated as a Line Support Processor (LSP). The LSP manages a plurality of line adapters, each of which handles a separate data comm line. The LSP includes internal processor means and interface circuit means to effectuate data transfer operations using a variety of protocols and systems both for bit-oriented and byte-oriented data transfers.

Abstract: In a data communications system where a plurality of line adapters connect to remote peripheral units there is provided a control system for controlling selected Automatic Calling Units which can dial connection lines to remote peripherals or systems. A microprocessor having output control registers can select specific line adapters having an ACU-output register. It can then load dialing-digit data and ON/OFF control data into the ACU-output register for controlling the associated Automatic Calling Unit.

Abstract: A line adapter unit working in conjunction with a microprocessor which serves to handle data transmission using the bit oriented protocol mode. The microprocessor can select any one of a plurality of input-output circuit units which provide specific control of communications to/from remote data terminals or data sets. The microprocessor can select and control various components of the input-output circuit means such as regulating the timing means and setting up command structures for controlling the type, the direction, and the conversion of serial bit data. Likewise, each component of an input-output circuit unit may request service via an interrupt to the microprocessor and receive a command or response required for further operations. Each input-output circuit unit is provided with a dedicated memory area associated with a given data communications line.

Abstract: A multiple group of line adapters in a data-comm I/O subsystem is controlled by a microprocessor which provides for selection and control of components associated with each line adapter in the organization.