Abstract: A powder deposition apparatus has a build plate, a powder source, a recoater arm, and an energy beam. The recoater arm is formed from ferromagnetic material. The recoater arm is arranged to deliver a layer of powder from the powder source across the working surface of the build plate prior to the energy beam fusing a predetermined portion of the delivered powder layer. The recoater arm comprises a magnetic portion.

Abstract: A fuel injector provided for gas turbine engine has a nozzle including pilot fuel and mains fuel discharge orifice's for respectively spraying pilot and mains fuel flows into a combustor of the engine. The injector further has a feed arm extending to the nozzle for feeding fuel to the pilot and mains discharge orifices from pilot and mains supplies respectively. The nozzle and the feed arm contain one or more pilot passages for flow of the pilot fuel flow from the pilot supply to the pilot discharge orifice and one or more mains passages for flow of the mains fuel flow from the mains supply to the mains discharge orifice. The nozzle and the feed arm contain a plurality of the pilot passages and/or a plurality of the mains passages. The pilot and the mains passages intertwine repeatedly, and are both smoothly curved as they intertwine around each other.

Abstract: A powder deposition apparatus has a build plate, a powder source, a recoater arm, and an energy beam. The recoater arm is formed from ferromagnetic material. The recoater arm is arranged to deliver a layer of powder from the powder source across the working surface of the build plate prior to the energy beam fusing a predetermined portion of the delivered powder layer. The recoater arm comprises a magnetic portion.

Abstract: A fuel injector provided for gas turbine engine has a nozzle including pilot fuel and mains fuel discharge orifice's for respectively spraying pilot and mains fuel flows into a combustor of the engine. The injector further has a feed arm extending to the nozzle for feeding fuel to the pilot and mains discharge orifices from pilot and mains supplies respectively. The nozzle and the feed arm contain one or more pilot passages for flow of the pilot fuel flow from the pilot supply to the pilot discharge orifice and one or more mains passages for flow of the mains fuel flow from the mains supply to the mains discharge orifice. The nozzle and the feed arm contain a plurality of the pilot passages and/or a plurality of the mains passages. The pilot and the mains passages intertwine repeatedly, and are both smoothly curved as they intertwine around each other.

Abstract: A bidirectional communications link between a master device and a slave device includes first endpoint circuitry coupled to the master device generating forward data packets, second endpoint circuitry coupled to the slave device for receiving reverse data packets, and bidirectional communication circuitry for transferring forward data packets from the first endpoint circuitry to the second endpoint circuitry and reverse data packets from the second endpoint circuitry to the first endpoint circuitry. In response to a power down condition requiring a power down of at least one of the first endpoint circuitry and the second endpoint circuitry, performance of said power down is deferred until both said outstanding forward credit signal and said outstanding reverse credit signal have been de-asserted.

Abstract: A system-on-chip integrated circuit 2 includes a packet transmitter 28 for generating data packets to be sent via a communication circuit 34 to a packet receiver 30 containing a buffer circuit 32. A transmitter counter 36 stores a transmitter count value counting data packets sent. A receiver counter 38 stores a receiver count value tracking data packets emptied from the buffer circuit 32. A comparison circuitry 40 is used to compare the transmitter count value and the receiver count value to determine whether or not there is storage space available within the buffer circuit 30 to receive transmission of further data packets. The packet transmitter 28 operates in a transmitter clock domain that is asynchronous from a receiver clock domain in which the packet receiver operates. One of the count values is passed across this asynchronous clock boundary in order that the comparison may be performed and flow control exercised.

Abstract: A bidirectional communications link between a master device and a slave device includes first endpoint circuitry coupled to the master device generating forward data packets, second endpoint circuitry coupled to the slave device for receiving reverse data packets, and bidirectional communication circuitry for transferring forward data packets from the first endpoint circuitry to the second endpoint circuitry and reverse data packets from the second endpoint circuitry to the first endpoint circuitry. In response to a power down condition requiring a power down of at least one of the first endpoint circuitry and the second endpoint circuitry, performance of said power down is deferred until both said outstanding forward credit signal and said outstanding reverse credit signal have been de-asserted.

Abstract: A system-on-chip integrated circuit 2 includes a packet transmitter 28 for generating data packets to be sent via a communication circuit 34 to a packet receiver 30 containing a buffer circuit 32. A transmitter counter 36 stores a transmitter count value counting data packets sent. A receiver counter 38 stores a receiver count value tracking data packets emptied from the buffer circuit 32. A comparison circuitry 40 is used to compare the transmitter count value and the receiver count value to determine whether or not there is storage space available within the buffer circuit 30 to receive transmission of further data packets. The packet transmitter 28 operates in a transmitter clock domain that is asynchronous from a receiver clock domain in which the packet receiver operates. One of the count values is passed across this asynchronous clock boundary in order that the comparison may be performed and flow control exercised.

Abstract: A direct memory access controller for controlling data transfer between a plurality of data sources and a plurality of data destinations is disclosed. The plurality of data sources and data destinations communicate with the direct memory access controller via a plurality of channels, the direct memory access controller further communicates with a memory and a processor. The memory stores two sets of control data for each of the plurality of channels and for the processor. The direct memory access controller is responsive to a data transfer request received from one of said plurality of channels or from said processor to access one set of said corresponding control data stored in said memory, said direct memory access performing at least a portion of said data transfer requested in dependence upon said accessed control data.

Abstract: A direct memory access controller for controlling data transfer between a plurality of data sources and a plurality of data destinations is disclosed. The plurality of data sources and data destinations communicate with the direct memory access controller via a plurality of channels, the direct memory access controller further communicates with a memory and a processor. The memory stores two sets of control data for each of the plurality of channels and for the processor. The direct memory access controller is responsive to a data transfer request received from one of said plurality of channels or from said processor to access one set of said corresponding control data stored in said memory, said direct memory access performing at least a portion of said data transfer requested in dependence upon said accessed control data.

Abstract: A direct memory access controller for controlling data transfer between a plurality of data sources and a plurality of data destinations is disclosed. The plurality of data sources and data destinations communicate with the direct memory access controller via a plurality of channels, the direct memory access controller further communicates with a memory and a processor. The memory stores two sets of control data for each of the plurality of channels and for the processor. The direct memory access controller is responsive to a data transfer request received from one of said plurality of channels or from said processor to access one set of said corresponding control data stored in said memory, said direct memory access performing at least a portion of said data transfer requested in dependence upon said accessed control data.

Abstract: A direct memory access controller for controlling data transfer between a plurality of data sources and a plurality of data destinations is disclosed. The plurality of data sources and data destinations communicate with the direct memory access controller via a plurality of channels, the direct memory access controller further communicates with a memory and a processor. The memory stores two sets of control data for each of the plurality of channels and for the processor. The direct memory access controller is responsive to a data transfer request received from one of said plurality of channels or from said processor to access one set of said corresponding control data stored in said memory, said direct memory access performing at least a portion of said data transfer requested in dependence upon said accessed control data.

Abstract: The invention relates woven and knit materials with an incorporated particulate solid and to a process for producing woven materials incorporated with a particulate solid. The process comprises: entraining a particulate solid in a gaseous carrier; disposing one face of a woven material in the path of a stream of said gaseous carrier and entrained particulate solid; maintaining a pressure drop across the woven material from said one face to the other face of said material, thereby to obtain a woven material with at least some of the entrained particulate solid in the gaseous carrier; and fixing the incorporated particulate solid.

Abstract: The invention relates woven and knit materials with an incorporated particulate solid and to a process for producing woven materials incorporated with a particulate solid. The process comprises: entraining a particulate solid in a gaseous carrier; disposing one face of a woven material in the path of a stream of said gaseous carrier and entrained particulate solid; maintaining a pressure drop across the woven material from said one face to the other face of said material, thereby to obtain a woven material with at least some of the entrained particulate solid in the gaseous carrier; and fixing the incorporated particulate solid.

Abstract: The invention relates woven and knit materials with an incorporated particulate solid and to a process for producing woven materials incorporated with a particulate solid. The process comprises: entraining a particulate solid in a gaseous carrier; disposing one face of a woven material in the path of a stream of said gaseous carrier and entrained particulate solid; maintaining a pressure drop across the woven material from said one face to the other face of said material, thereby to obtain a woven material with at least some of the entrained particulate solid in the gaseous carrier; and fixing the incorporated particulate solid.