Patents by Inventor Richard Alfred Beaupre
Richard Alfred Beaupre has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20150236151Abstract: A semiconductor device is presented. The device includes a semiconductor layer including silicon carbide, and having a first surface and a second surface. A gate insulating layer is disposed on a portion of the first surface of the semiconductor layer, and a gate electrode is disposed on the gate insulating layer. The device further includes an oxide disposed between the gate insulating layer and the gate electrode at a corner adjacent an edge of the gate electrode so as the gate insulating layer has a greater thickness at the corner than a thickness at a center of the layer. A method for fabricating the device is also provided.Type: ApplicationFiled: February 18, 2014Publication date: August 20, 2015Applicant: GENERAL ELECTRIC COMPANYInventors: James Jay McMahon, Ljubisa Dragoljub Stevanovic, Stephen Daley Arthur, Thomas Bert Gorczyca, Richard Alfred Beaupre, Zachary Matthew Stum, Alexander Viktorovich Bolotnikov
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Patent number: 8982558Abstract: A cooling device for a power module having an electronic module disposed on a base plate via a substrate is disclosed. The cooling device includes a heat sink plate having at least one cooling segment. The cooling segment includes an inlet plenum for entry of a cooling medium, a plurality of inlet manifold channels, a plurality of outlet manifold channels, and an outlet plenum. The plurality of inlet manifold channels are coupled orthogonally to the inlet plenum for receiving the cooling medium from the inlet plenum. The plurality of outlet manifold channels are disposed parallel to the inlet manifold channels. The outlet plenum is coupled orthogonally to the plurality of outlet manifold channels for exhaust of the cooling medium. A plurality of millichannels are disposed in the base plate orthogonally to the inlet and the outlet manifold channels. The plurality of milli channels direct the cooling medium from the plurality of inlet manifold channels to the plurality of outlet manifold channels.Type: GrantFiled: June 24, 2011Date of Patent: March 17, 2015Assignee: General Electric CompanyInventors: Richard Alfred Beaupre, Joseph Lucian Smolenski, William Dwight Gerstler, Xiaochun Shen
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Patent number: 8929071Abstract: A cooling device includes a ceramic substrate with a metal layer bonded to an outer planar surface. The cooling device also includes a channel layer bonded to an opposite side of the ceramic substrate and a manifold layer bonded to an outer surface of the channel layer. The substrate layers are bonded together using a high temperature process such as brazing to form a single substrate assembly. A plenum housing is bonded to the single substrate assembly via a low temperature bonding process such as adhesive bonding and is configured to provide extended manifold layer inlet and outlet ports.Type: GrantFiled: December 22, 2008Date of Patent: January 6, 2015Assignee: General Electric CompanyInventors: Richard Alfred Beaupre, Ljubisa Dragoljub Stevanovic, Daniel Jason Erno, Charles Gerard Woychik
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Patent number: 8853550Abstract: A circuit board includes a solder wettable surface and a metal mask configured to restrict solder from flowing outside the solder wettable surface of the circuit board.Type: GrantFiled: February 25, 2011Date of Patent: October 7, 2014Assignee: General Electric CompanyInventors: Arun Virupaksha Gowda, Kevin Matthew Durocher, James Wilson Rose, Paul Jeffrey Gillespie, Richard Alfred Beaupre, David Richard Esler
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Patent number: 8772634Abstract: A busbar for power conversion applications that includes two planar conductors that have terminal locations; a first planar insulator located between the planar conductors; two impedances elements that are electrically connected to each of the planar conductors, wherein the impedance elements each extend in a plane that is non-coplanar from the planar conductors, further wherein the impedance elements are configured so as to define a gap between them; and a second planar insulator is located in the gap. A power conversion assembly that connects an energy source and a power switch to the busbar.Type: GrantFiled: February 28, 2011Date of Patent: July 8, 2014Assignee: General Electric CompanyInventors: Richard Alfred Beaupre, Joseph Lucian Smolenski
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Patent number: 8675379Abstract: A power-converting apparatus, such as a power module, may include a base plate (16), a first direct current (DC) bus and a second DC bus (22, 24). A power semiconductor component (18, 20) may be electrically coupled to one of the buses, and may be disposed on a substrate (12, 14) physically coupled to the base plate. The power semiconductor component may be made from a high-temperature, wide bandgap material, and the substrate may be exposed to a heat flux based on an operational temperature of the power semiconductor component. At least a first capacitor (50) may be coupled across the first and second DC buses, and at least second and third capacitors (52) may be respectively coupled across respective ones of the first and second buses and an alternating current (AC) return path.Type: GrantFiled: August 8, 2011Date of Patent: March 18, 2014Assignee: General Electric CompanyInventors: Joseph Lucian Smolenski, Michael Schutten, Eladio Clemente Delgado, Richard Alfred Beaupre
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Patent number: 8622754Abstract: A flexible power connector is presented.Type: GrantFiled: July 31, 2011Date of Patent: January 7, 2014Assignee: General Electric CompanyInventors: Eladio Clemente Delgado, Richard Alfred Beaupre, Brian Lynn Rowden
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Patent number: 8586421Abstract: A semiconductor device package includes a semiconductor device having connection pads formed thereon, with the connection pads being formed on first and second surfaces of the semiconductor device with edges of the semiconductor device extending therebetween. A first passivation layer is applied on the semiconductor device and a base dielectric laminate is affixed to the first surface of the semiconductor device that has a thickness greater than that of the first passivation layer. A second passivation layer having a thickness greater than that of the first passivation layer is applied over the first passivation layer and the semiconductor device to cover the second surface and the edges of the semiconductor device, and metal interconnects are coupled to the connection pads, with the metal interconnects extending through vias formed through the first and second passivation layers and the base dielectric laminate sheet to form a connection with the connection pads.Type: GrantFiled: September 7, 2012Date of Patent: November 19, 2013Assignee: General Electric CompanyInventors: Richard Alfred Beaupre, Paul Alan McConnelee, Arun Virupaksha Gowda, Thomas Bert Gorczyca
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Patent number: 8487416Abstract: A power module includes at least one semiconductor die holding structure. Each die holding structure has a substantially cylindrical outer profile and a central axis. Each die holding structure is disposed within a common cylindrical EMI shield. A plurality of semiconductor devices are mounted to each die holding structure to form a substantially symmetric die mounting pattern respect to the central axis of the die holding structure.Type: GrantFiled: September 28, 2011Date of Patent: July 16, 2013Assignee: General Electric CompanyInventors: Eladio Clemente Delgado, Arun Virupaksha Gowda, Antonio Caiafa, Brian Lynn Rowden, Ljubisa Dragoljub Stevanovic, Richard Alfred Beaupre
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Patent number: 8466007Abstract: A power semiconductor module includes: an interconnect layer including an electrical conductor patterned on a dielectric layer, the electrical conductor including a power coupling portion having a thickness sufficient to carry power currents and a control coupling portion having a thickness thinner than that of the power coupling portion; and a semiconductor power device physically coupled to the interconnect layer and electrically coupled to the power coupling portion of the electrical conductor.Type: GrantFiled: September 20, 2011Date of Patent: June 18, 2013Assignee: General Electric CompanyInventors: Eladio Clemente Delgado, Richard Alfred Beaupre, Stephen Daley Arthur, Ernest Wayne Balch, Kevin Matthew Durocher, Paul Alan McConnelee, Raymond Albert Fillion
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Publication number: 20130075878Abstract: A power module includes at least one semiconductor die holding structure. Each die holding structure has a substantially cylindrical outer profile and a central axis. Each die holding structure is disposed within a common cylindrical EMI shield. A plurality of semiconductor devices are mounted to each die holding structure to form a substantially symmetric die mounting pattern respect to the central axis of the die holding structure.Type: ApplicationFiled: September 28, 2011Publication date: March 28, 2013Applicant: GENERAL ELECTRIC COMPANYInventors: Eladio Clemente Delgado, Arun Virupaksha Gowda, Antonio Caiafa, Brian Lynn Rowden, Ljubisa Dragoljub Stevanovic, Richard Alfred Beaupre
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Publication number: 20130039103Abstract: A power-converting apparatus, such as a power module, may include a base plate (16), a first direct current (DC) bus and a second DC bus (22, 24). A power semiconductor component (18, 20) may be electrically coupled to one of the buses, and may be disposed on a substrate (12, 14) physically coupled to the base plate. The power semiconductor component may be made from a high-temperature, wide bandgap material, and the substrate may be exposed to a heat flux based on an operational temperature of the power semiconductor component. At least a first capacitor (50) may be coupled across the first and second DC buses, and at least second and third capacitors (52) may be respectively coupled across respective ones of the first and second buses and an alternating current (AC) return path.Type: ApplicationFiled: August 8, 2011Publication date: February 14, 2013Inventors: JOSEPH LUCIAN SMOLENSKI, MICHAEL SCHUTTEN, ELADIO CLEMENTE DELGADO, RICHARD ALFRED BEAUPRE
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Publication number: 20130029531Abstract: A flexible power connector is presented.Type: ApplicationFiled: July 31, 2011Publication date: January 31, 2013Applicant: GENERAL ELECTRIC COMPANYInventors: Eladio Clemente Delgado, Richard Alfred Beaupre, Brian Lynn Rowden
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Patent number: 8358000Abstract: A power module includes one or more semiconductor power devices having a power overlay (POL) bonded thereto. A first heat sink is bonded to the semiconductor power devices on a side opposite the POL. A second heat sink is bonded to the POL opposite the side of the POL bonded to the semiconductor power devices. The semiconductor power devices, POL, first channel heat sink, and second channel heat sink together form a double side cooled power overlay module. The second channel heat sink is bonded to the POL solely via a compliant thermal interface material without the need for planarizing, brazing or metallurgical bonding.Type: GrantFiled: March 13, 2009Date of Patent: January 22, 2013Assignee: General Electric CompanyInventors: Richard Alfred Beaupre, Arun Virupaksha Gowda, Ljubisa Dragol jub Stevanovic, Stephen Adam Solovitz
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Publication number: 20120329207Abstract: A semiconductor device package includes a semiconductor device having connection pads formed thereon, with the connection pads being formed on first and second surfaces of the semiconductor device with edges of the semiconductor device extending therebetween. A first passivation layer is applied on the semiconductor device and a base dielectric laminate is affixed to the first surface of the semiconductor device that has a thickness greater than that of the first passivation layer. A second passivation layer having a thickness greater than that of the first passivation layer is applied over the first passivation layer and the semiconductor device to cover the second surface and the edges of the semiconductor device, and metal interconnects are coupled to the connection pads, with the metal interconnects extending through vias formed through the first and second passivation layers and the base dielectric laminate sheet to form a connection with the connection pads.Type: ApplicationFiled: September 7, 2012Publication date: December 27, 2012Inventors: Richard Alfred Beaupre, Paul Alan McConnelee, Arun Virupaksha Gowda, Thomas Bert Gorczyca
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Publication number: 20120327603Abstract: A cooling device for a power module having an electronic module disposed on a base plate via a substrate is disclosed. The cooling device includes a heat sink plate having at least one cooling segment. The cooling segment includes an inlet plenum for entry of a cooling medium, a plurality of inlet manifold channels, a plurality of outlet manifold channels, and an outlet plenum. The plurality of inlet manifold channels are coupled orthogonally to the inlet plenum for receiving the cooling medium from the inlet plenum. The plurality of outlet manifold channels are disposed parallel to the inlet manifold channels. The outlet plenum is coupled orthogonally to the plurality of outlet manifold channels for exhaust of the cooling medium. A plurality of millichannels are disposed in the base plate orthogonally to the inlet and the outlet manifold channels. The plurality of milli channels direct the cooling medium from the plurality of inlet manifold channels to the plurality of outlet manifold channels.Type: ApplicationFiled: June 24, 2011Publication date: December 27, 2012Applicant: GENERAL ELECTRIC COMPANYInventors: Richard Alfred Beaupre, Joseph Lucian Smolenski, William Dwight Gerstler, Xiaochun Shen
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Patent number: 8310040Abstract: A semiconductor device package includes a semiconductor device having connection pads formed thereon, with the connection pads being formed on first and second surfaces of the semiconductor device with edges of the semiconductor device extending therebetween. A first passivation layer is applied on the semiconductor device and a base dielectric laminate is affixed to the first surface of the semiconductor device that has a thickness greater than that of the first passivation layer. A second passivation layer having a thickness greater than that of the first passivation layer is applied over the first passivation layer and the semiconductor device to cover the second surface and the edges of the semiconductor device, and metal interconnects are coupled to the connection pads, with the metal interconnects extending through vias formed through the first and second passivation layers and the base dielectric laminate sheet to form a connection with the connection pads.Type: GrantFiled: December 8, 2010Date of Patent: November 13, 2012Assignee: General Electric CompanyInventors: Richard Alfred Beaupre, Paul Alan McConnelee, Arun Virupaksha Gowda, Thomas Bert Gorczyca
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Patent number: 8257102Abstract: A dual pole busbar power connector including opposing elements configured to form a slot configured to receive a dual-pole blade therebetween. The slot extends from busbars to opposing element distal ends. The opposing elements each includes: a first contact extending into the slot from the opposing element; and a second contact extending into the slot from the opposing element and disposed farther from a slot busbar end than the first contact. When the dual-pole blade is inserted in the slot the first contact contacts a respective blade element at a location in the slot more proximate the slot busbar end than a slot distal end.Type: GrantFiled: June 3, 2010Date of Patent: September 4, 2012Assignee: General Electric CompanyInventors: Eladio Clemente Delgado, Ljubisa Stevanovic, Richard Alfred Beaupre
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Publication number: 20120217032Abstract: A busbar for power conversion applications that includes two planar conductors that have terminal locations; a first planar insulator located between the planar conductors; two impedances elements that are electrically connected to each of the planar conductors, wherein the impedance elements each extend in a plane that is non-coplanar from the planar conductors, further wherein the impedance elements are configured so as to define a gap between them; and a second planar insulator is located in the gap. A power conversion assembly that connects an energy source and a power switch to the busbar is disclosed. The present invention has been described in terms of specific embodiment(s), and it is recognized that equivalents, alternatives, and modifications, aside from those expressly stated, are possible and within the scope of the appending claims.Type: ApplicationFiled: February 28, 2011Publication date: August 30, 2012Applicant: GENERAL ELECTRIC COMPANYInventors: Richard Alfred Beaupre, Joseph Lucian Smolenski
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Patent number: 8232637Abstract: A power module includes one or more semiconductor power devices bonded to an insulated metal substrate (IMS). A plurality of cooling fluid channels is integrated into the IMS.Type: GrantFiled: April 30, 2009Date of Patent: July 31, 2012Assignee: General Electric CompanyInventors: Richard Alfred Beaupre, Peter Almern Losee, Xiaochun Shen, John Stanley Glaser, Joseph Lucian Smolenski, Adam Gregory Pautsch