Abstract: A circuit and method for synchronizing a service clock at a destination node with a service clock at a source node for circuit emulation service over a packet network. The method includes receiving data packets from a source node at at least one port of the destination node. At the destination node, the method removes from the data packets residual time stamp (RTS) values that were created at the source node based on at least the service clock at the source node. RTS values are stored in memory at the destination node. The method determines a majority count and a minority count of RTS values over a period of time from the RTS values stored in memory. The method further uses the majority and minority counts to set the frequency of a service clock at the destination node for use in receiving data packets.

Abstract: A circuit and method for synchronizing a service clock at a destination node with a service clock at a source node for circuit emulation service over a packet network. The method includes receiving data packets from a source node at at least one port of the destination node. At the destination node, the method removes from the data packets residual time stamp (RTS) values that were created at the source node based on at least the service clock at the source node. RTS values are stored in memory at the destination node. The method determines a majority count and a minority count of RTS values over a period of time from the RTS values stored in memory. The method further uses the majority and minority counts to set the frequency of a service clock at the destination node for use in receiving data packets.

Abstract: A circuit and method for synchronizing a service clock at a destination node with a service clock at a source node for circuit emulation service over a packet network. The method includes receiving data packets from a source node at at least one port of the destination node. At the destination node, the method removes from the data packets residual time stamp (RTS) values that were created at the source node based on at least the service clock at the source node. RTS values are stored in memory at the destination node. The method determines a majority count and a minority count of RTS values over a period of time from the RTS values stored in memory. The method further uses the majority and minority counts to set the frequency of a service clock at the destination node for use in receiving data packets.

Abstract: A phase lock loop circuit. The phase lock loop circuit includes first and second pass gates. The pass gates include signal inputs that receive first and second reference signals, respectively. The pass gates also have enable inputs. The phase lock loop also includes a loop filter that is coupled to the outputs of the first and second pass gates. A loop oscillator is coupled to the output of the loop filter. A strobe circuit is coupled to the output of the loop oscillator. The strobe circuit provides an input signal to the enable inputs of the first and second pass gates so as to sample the first and second reference signals. The loop filter uses the samples of the first and second reference signals to create a control signal that forces the loop oscillator to output a signal with a phase that is between the phases of the first and second reference signals.