Patents by Inventor Richard Austin Blanchard

Richard Austin Blanchard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10497672
    Abstract: Active LEDs have a control transistor in series with an LED and have a top electrode, a bottom electrode, and a control electrode. The active LEDs are microscopic and dispersed in an ink. A substrate has column lines, and the active LEDs are printed at various pixel locations so the bottom electrodes contact the column lines. A hydrophobic mask defines the pixel locations. Due to the printing process, there are different numbers of active LEDs in the various pixel locations. Row lines and control lines contact the top and control electrodes so that the active LEDs in each single pixel location are connected in parallel. If the LEDs emit blue light, red and green phosphors are printed over various pixel locations to create an ultra-thin color display. Any active LED may be addressed using row and column addressing, and the brightness may be controlled using the control lines.
    Type: Grant
    Filed: October 6, 2017
    Date of Patent: December 3, 2019
    Assignee: Nthdegree Technologies Worldwide Inc.
    Inventors: William Johnstone Ray, Mark David Lowenthal, Richard Austin Blanchard, Lixin Zheng, Xiaorong Cai, Bradley S. Oraw
  • Patent number: 10499499
    Abstract: A programmable circuit includes an array of printed groups of microscopic transistors or diodes. The devices are pre-formed and printed as an ink and cured. A patterned hydrophobic layer defines the locations of the printed dots of the devices. The devices in each group are connected in parallel so that each group acts as a single device. Each group has at least one electrical lead that terminates in a patch area on the substrate. An interconnection conductor pattern interconnects at least some of the leads of the groups in the patch area to create logic circuits for a customized application of the generic circuit. The groups may also be interconnected to be logic gates, and the gate leads terminate in the patch area. The interconnection conductor pattern then interconnects the gates for form complex logic circuits.
    Type: Grant
    Filed: January 11, 2018
    Date of Patent: December 3, 2019
    Assignee: Nthdegree Technologies Worldwide Inc.
    Inventors: William Johnstone Ray, Richard Austin Blanchard, Mark David Lowenthal, Bradley Steven Oraw
  • Patent number: 10412833
    Abstract: A programmable circuit includes an array of printed groups of microscopic transistors or diodes having pn junctions. The devices are pre-formed and printed as an ink and cured. The devices have a proper orientation and a reverse orientation after settling on a conductor layer. The devices are connected in parallel within small groups. To neutralize the reverse-oriented devices, a sufficient voltage is applied across the parallel-connected diodes to forward bias only the devices having the reverse orientation. This causes a sufficient current to flow through each of the reverse-orientated devices to destroy an electrical interface between an electrode of the devices and the conductor layer to create an open circuit, such that those devices do not affect a rectifying function of the devices in the group having the proper orientation. An interconnection conductor pattern may then interconnect the groups to form complex logic circuits.
    Type: Grant
    Filed: September 19, 2018
    Date of Patent: September 10, 2019
    Assignee: Nthdegree Technologies Worldwide Inc.
    Inventors: Richard Austin Blanchard, William Johnstone Ray
  • Publication number: 20190098759
    Abstract: A programmable circuit includes an array of printed groups of microscopic transistors or diodes having pn junctions. The devices are pre-formed and printed as an ink and cured. The devices have a proper orientation and a reverse orientation after settling on a conductor layer. The devices are connected in parallel within small groups. To neutralize the reverse-oriented devices, a sufficient voltage is applied across the parallel-connected diodes to forward bias only the devices having the reverse orientation. This causes a sufficient current to flow through each of the reverse-orientated devices to destroy an electrical interface between an electrode of the devices and the conductor layer to create an open circuit, such that those devices do not affect a rectifying function of the devices in the group having the proper orientation. An interconnection conductor pattern may then interconnect the groups to form complex logic circuits.
    Type: Application
    Filed: September 19, 2018
    Publication date: March 28, 2019
    Inventors: Richard Austin Blanchard, William Johnstone Ray
  • Publication number: 20180132347
    Abstract: A programmable circuit includes an array of printed groups of microscopic transistors or diodes. The devices are pre-formed and printed as an ink and cured. A patterned hydrophobic layer defines the locations of the printed dots of the devices. The devices in each group are connected in parallel so that each group acts as a single device. Each group has at least one electrical lead that terminates in a patch area on the substrate. An interconnection conductor pattern interconnects at least some of the leads of the groups in the patch area to create logic circuits for a customized application of the generic circuit. The groups may also be interconnected to be logic gates, and the gate leads terminate in the patch area. The interconnection conductor pattern then interconnects the gates for form complex logic circuits.
    Type: Application
    Filed: January 11, 2018
    Publication date: May 10, 2018
    Inventors: William Johnstone Ray, Richard Austin Blanchard, Mark David Lowenthal, Bradley Steven Oraw
  • Publication number: 20180114775
    Abstract: Active LEDs have a control transistor in series with an LED and have a top electrode, a bottom electrode, and a control electrode. The active LEDs are microscopic and dispersed in an ink. A substrate has column lines, and the active LEDs are printed at various pixel locations so the bottom electrodes contact the column lines. A hydrophobic mask defines the pixel locations. Due to the printing process, there are different numbers of active LEDs in the various pixel locations. Row lines and control lines contact the top and control electrodes so that the active LEDs in each single pixel location are connected in parallel. If the LEDs emit blue light, red and green phosphors are printed over various pixel locations to create an ultra-thin color display. Any active LED may be addressed using row and column addressing, and the brightness may be controlled using the control lines.
    Type: Application
    Filed: October 6, 2017
    Publication date: April 26, 2018
    Inventors: William Johnstone Ray, Mark David Lowenthal, Richard Austin Blanchard, Lixin Zheng, Xiaorong Cai, Bradley S. Oraw
  • Patent number: 9913371
    Abstract: A programmable circuit includes an array of printed groups of microscopic transistors or diodes. The devices are pre-formed and printed as an ink and cured. A patterned hydrophobic layer defines the locations of the printed dots of the devices. The devices in each group are connected in parallel so that each group acts as a single device. Each group has at least one electrical lead that terminates in a patch area on the substrate. An interconnection conductor pattern interconnects at least some of the leads of the groups in the patch area to create logic circuits for a customized application of the generic circuit. The groups may also be interconnected to be logic gates, and the gate leads terminate in the patch area. The interconnection conductor pattern then interconnects the gates for form complex logic circuits.
    Type: Grant
    Filed: January 13, 2017
    Date of Patent: March 6, 2018
    Assignee: Nthdegree Technologies Worldwide Inc.
    Inventors: William Johnstone Ray, Richard Austin Blanchard, Mark David Lowenthal, Bradley Steven Oraw
  • Patent number: 9887425
    Abstract: A plurality of batteries is printed on a flexible substrate, where each battery may output the same voltage, such as about 1.5 volts. Batteries in a first subset are connectable in parallel by controllable switches to control the maximum current that can be delivered to a load. Batteries in a second subset are also connectable in parallel by additional controllable switches to control the maximum current that can be delivered to the load. Another group of switches can either connect the two subsets of batteries in series, to generate 3 volts, or connect the subsets in parallel to increase the maximum current. Additional subsets of batteries and their associated switches may be further connected to increase the voltage and current. The power supply may be standardized and configured by the user for a particular load, such as a sensor for a medical skin patch.
    Type: Grant
    Filed: January 12, 2016
    Date of Patent: February 6, 2018
    Assignee: Printed Energy Pty. Ltd.
    Inventors: Richard Austin Blanchard, William Johnstone Ray, Mark David Lowenthal, Thomas Frederick Soules, Vera Lockett
  • Publication number: 20170135214
    Abstract: A programmable circuit includes an array of printed groups of microscopic transistors or diodes. The devices are pre-formed and printed as an ink and cured. A patterned hydrophobic layer defines the locations of the printed dots of the devices. The devices in each group are connected in parallel so that each group acts as a single device. Each group has at least one electrical lead that terminates in a patch area on the substrate. An interconnection conductor pattern interconnects at least some of the leads of the groups in the patch area to create logic circuits for a customized application of the generic circuit. The groups may also be interconnected to be logic gates, and the gate leads terminate in the patch area. The interconnection conductor pattern then interconnects the gates for form complex logic circuits.
    Type: Application
    Filed: January 13, 2017
    Publication date: May 11, 2017
    Inventors: William Johnstone Ray, Richard Austin Blanchard, Mark David Lowenthal, Bradley Steven Oraw
  • Publication number: 20170125372
    Abstract: A programmable circuit includes an array of printed groups of microscopic transistors or diodes. The devices are pre-formed and printed as an ink and cured. The devices in each group are connected in parallel so that each group acts as a single device. In one embodiment, about 10 devices are contained in each group so the redundancy makes each group very reliable. Each group has at least one electrical lead that terminates in a patch area on the substrate. An interconnection conductor pattern interconnects at least some of the leads of the groups in the patch area to create logic circuits for a customized application of the generic circuit. The groups may also be interconnected to be logic gates, and the gate leads terminate in the patch area. The interconnection conductor pattern then interconnects the gates for form complex logic circuits.
    Type: Application
    Filed: January 18, 2017
    Publication date: May 4, 2017
    Inventors: William Johnstone Ray, Richard Austin Blanchard, Mark David Lowenthal, Bradley Steven Oraw
  • Patent number: 9577007
    Abstract: An LED module is disclosed containing an integrated driver transistor (e.g, a MOSFET) in series with an LED. In one embodiment, LED layers are grown over a substrate. The transistor regions are formed over the same substrate. After the LED layers, such as GaN layers, are grown to form the LED portion, a central area of the LED is etched away to expose a semiconductor surface in which the transistor regions are formed. A conductor connects the transistor in series with the LED. Another node of the transistor is electrically coupled to an electrode on the bottom surface of the substrate. In one embodiment, an anode of the LED is connected to one terminal of the module, one current carrying node of the transistor is connected to a second terminal of the module, and the control terminal of the transistor is connected to a third terminal of the module.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: February 21, 2017
    Assignee: Nthdegree Technologies Worldwide Inc.
    Inventors: Richard Austin Blanchard, Bradley Steven Oraw
  • Patent number: 9572249
    Abstract: A programmable circuit includes an array of printed groups of microscopic transistors or diodes. The devices are pre-formed and printed as an ink and cured. The devices in each group are connected in parallel so that each group acts as a single device. In one embodiment, about 10 devices are contained in each group so the redundancy makes each group very reliable. Each group has at least one electrical lead that terminates in a patch area on the substrate. An interconnection conductor pattern interconnects at least some of the leads of the groups in the patch area to create logic circuits for a customized application of the generic circuit. The groups may also be interconnected to be logic gates, and the gate leads terminate in the patch area. The interconnection conductor pattern then interconnects the gates for form complex logic circuits.
    Type: Grant
    Filed: March 11, 2014
    Date of Patent: February 14, 2017
    Assignee: Nthdegree Technologies Worldwide Inc.
    Inventors: William Johnstone Ray, Richard Austin Blanchard, Mark David Lowenthal, Bradley Steven Oraw
  • Publication number: 20160218373
    Abstract: A plurality of batteries is printed on a flexible substrate, where each battery may output the same voltage, such as about 1.5 volts. Batteries in a first subset are connectable in parallel by controllable switches to control the maximum current that can be delivered to a load. Batteries in a second subset are also connectable in parallel by additional controllable switches to control the maximum current that can be delivered to the load. Another group of switches can either connect the two subsets of batteries in series, to generate 3 volts, or connect the subsets in parallel to increase the maximum current. Additional subsets of batteries and their associated switches may be further connected to increase the voltage and current. The power supply may be standardized and configured by the user for a particular load, such as a sensor for a medical skin patch.
    Type: Application
    Filed: January 12, 2016
    Publication date: July 28, 2016
    Inventors: Richard Austin Blanchard, William Johnstone Ray, Mark David Lowenthal, Thomas Frederick Soules, Vera Lockett
  • Patent number: 9275978
    Abstract: A layer of microscopic, 3-terminal transistors is printed over a first conductor layer so that bottom electrodes of the transistors electrically contact the first conductor layer. A first dielectric layer overlies the first conductor layer, and a second conductor layer over the first dielectric layer contacts intermediate electrodes on the transistors between the bottom electrodes and top electrodes. A second dielectric layer overlies the second conductor layer, and a third conductor layer over the second dielectric layer contacts the top electrodes. The devices are thus electrically connected in parallel by a combination of the first conductor layer, the second conductor layer, and the third conductor layer. Separate groups of the devices may be interconnected to form more complex circuits. The resulting circuit may be a very thin flex-circuit.
    Type: Grant
    Filed: July 1, 2015
    Date of Patent: March 1, 2016
    Assignee: Nthdegree Technologies Worldwide Inc.
    Inventors: Richard Austin Blanchard, Bradley S. Oraw
  • Publication number: 20160020248
    Abstract: An LED module is disclosed containing an integrated driver transistor (e.g, a MOSFET) in series with an LED. In one embodiment, LED layers are grown over a substrate. The transistor regions are formed over the same substrate. After the LED layers, such as GaN layers, are grown to form the LED portion, a central area of the LED is etched away to expose a semiconductor surface in which the transistor regions are formed. A conductor connects the transistor in series with the LED. Another node of the transistor is electrically coupled to an electrode on the bottom surface of the substrate. In one embodiment, an anode of the LED is connected to one terminal of the module, one current carrying node of the transistor is connected to a second terminal of the module, and the control terminal of the transistor is connected to a third terminal of the module.
    Type: Application
    Filed: September 28, 2015
    Publication date: January 21, 2016
    Inventors: Richard Austin Blanchard, Bradley Steven Oraw
  • Patent number: 9177992
    Abstract: An LED module is disclosed containing an integrated driver transistor (e.g, a MOSFET) in series with an LED. In one embodiment, LED layers are grown over a substrate. The transistor regions are formed over the same substrate. After the LED layers, such as GaN layers, are grown to form the LED portion, a central area of the LED is etched away to expose a semiconductor surface in which the transistor regions are formed. A conductor connects the transistor in series with the LED. Another node of the transistor is electrically coupled to an electrode on the bottom surface of the substrate. In one embodiment, an anode of the LED is connected to one terminal of the module, one current carrying node of the transistor is connected to a second terminal of the module, and the control terminal of the transistor is connected to a third terminal of the module.
    Type: Grant
    Filed: March 11, 2014
    Date of Patent: November 3, 2015
    Assignee: Nthdegree Technologies Worldwide Inc.
    Inventors: Richard Austin Blanchard, Bradley Steven Oraw
  • Publication number: 20150303177
    Abstract: A layer of microscopic, 3-terminal transistors is printed over a first conductor layer so that bottom electrodes of the transistors electrically contact the first conductor layer. A first dielectric layer overlies the first conductor layer, and a second conductor layer over the first dielectric layer contacts intermediate electrodes on the transistors between the bottom electrodes and top electrodes. A second dielectric layer overlies the second conductor layer, and a third conductor layer over the second dielectric layer contacts the top electrodes. The devices are thus electrically connected in parallel by a combination of the first conductor layer, the second conductor layer, and the third conductor layer. Separate groups of the devices may be interconnected to form more complex circuits. The resulting circuit may be a very thin flex-circuit.
    Type: Application
    Filed: July 1, 2015
    Publication date: October 22, 2015
    Inventors: Richard Austin Blanchard, Bradley S. Oraw
  • Patent number: 9099568
    Abstract: A layer of microscopic, 3-terminal transistors is printed over a first conductor layer so that bottom electrodes of the transistors electrically contact the first conductor layer. A first dielectric layer overlies the first conductor layer, and a second conductor layer over the first dielectric layer contacts intermediate electrodes on the transistors between the bottom electrodes and top electrodes. A second dielectric layer overlies the second conductor layer, and a third conductor layer over the second dielectric layer contacts the top electrodes. The devices are thus electrically connected in parallel by a combination of the first conductor layer, the second conductor layer, and the third conductor layer. Separate groups of the devices may be interconnected to form more complex circuits. The resulting circuit may be a very thin flex-circuit.
    Type: Grant
    Filed: March 11, 2014
    Date of Patent: August 4, 2015
    Assignee: Nthdegree Technologies Worldwide Inc.
    Inventor: Richard Austin Blanchard
  • Publication number: 20140264460
    Abstract: A layer of microscopic, 3-terminal transistors is printed over a first conductor layer so that bottom electrodes of the transistors electrically contact the first conductor layer. A first dielectric layer overlies the first conductor layer, and a second conductor layer over the first dielectric layer contacts intermediate electrodes on the transistors between the bottom electrodes and top electrodes. A second dielectric layer overlies the second conductor layer, and a third conductor layer over the second dielectric layer contacts the top electrodes. The devices are thus electrically connected in parallel by a combination of the first conductor layer, the second conductor layer, and the third conductor layer. Separate groups of the devices may be interconnected to form more complex circuits. The resulting circuit may be a very thin flex-circuit.
    Type: Application
    Filed: March 11, 2014
    Publication date: September 18, 2014
    Applicant: Nthdegree Technologies Worldwide Inc.
    Inventor: Richard Austin Blanchard
  • Publication number: 20140268591
    Abstract: A programmable circuit includes an array of printed groups of microscopic transistors or diodes. The devices are pre-formed and printed as an ink and cured. The devices in each group are connected in parallel so that each group acts as a single device. In one embodiment, about 10 devices are contained in each group so the redundancy makes each group very reliable. Each group has at least one electrical lead that terminates in a patch area on the substrate. An interconnection conductor pattern interconnects at least some of the leads of the groups in the patch area to create logic circuits for a customized application of the generic circuit. The groups may also be interconnected to be logic gates, and the gate leads terminate in the patch area. The interconnection conductor pattern then interconnects the gates for form complex logic circuits.
    Type: Application
    Filed: March 11, 2014
    Publication date: September 18, 2014
    Applicant: Nthdegree Technologies Worldwide Inc.
    Inventors: William Johnstone Ray, Richard Austin Blanchard, Mark David Lowenthal, Bradley Steven Oraw