Patents by Inventor Richard B. Brown

Richard B. Brown has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11674924
    Abstract: Sensor devices and systems can include a silicon substrate comprising a sensor-side and a backside. The backside can include a backside electrode. The sensor-side can include a chemical sensor. The chemical sensor can include a chemical sensor electrode, the chemical sensor electrode can be electrically coupled to the backside electrode by a through-silicon via (TSV), the TSV being physically and electrically connected to the chemical sensor electrode and extending from the chemical sensor electrode through the silicon substrate towards the backside. The TSV can electrically connect the chemical sensor to the backside electrode. A printed circuit board can surround the sensor device and can include a metal contact pad. The metal contact pad can be electrically coupled to the backside electrode by a wire bond. The sensor-side can include a polymeric membrane covering the chemical sensor.
    Type: Grant
    Filed: July 22, 2019
    Date of Patent: June 13, 2023
    Assignee: E-SENS, INC.
    Inventors: Richard B. Brown, Ondrej Novak
  • Patent number: 11331664
    Abstract: Aspects of the embodiments are directed to a microfluidic chip that includes a plurality of openings to expose a microfluidic channel. The plurality of openings are within a recessed area of the microfluidics chip, the recess defining a surface onto which a sensor die can be clamped. The surface can include a clamping bump that contacts a membrane of a solid-state chemical sensor. The surface can also include a glue stop that, in some embodiments, can act as a spacer to prevent over-compression of the sensor die as it is clamped onto the microfluidic chip. The microfluidic chip can include a rigid structure, such as a printed circuit board, that is affixed to a top surface of the microfluidic chip. The rigid structure can include contact pads that are electrically connected to sensor electrodes on the sensor die by a wire.
    Type: Grant
    Filed: November 1, 2019
    Date of Patent: May 17, 2022
    Assignee: E-SENS, INC.
    Inventors: Richard B. Brown, Ondrej Novak
  • Patent number: 10710068
    Abstract: Aspects of the embodiments are directed to a microfluidic chip and methods of making the same. The microfluidic chip can include a sensor device residing on the microfluidic chip, the sensor-side comprising a chemical sensor and the backside including a backside electrode, the chemical sensor electrically coupled to the backside electrode by a via; a microfluidics channel in the microfluidic chip, the sensor-side of the sensor device facing the microfluidics channel; and a metal contact electrically connected to the backside electrode.
    Type: Grant
    Filed: September 20, 2017
    Date of Patent: July 14, 2020
    Assignee: e-SENSE, Inc.
    Inventors: Richard B. Brown, Ondrej Novak
  • Publication number: 20200139365
    Abstract: Aspects of the embodiments are directed to a microfluidic chip that includes a plurality of openings to expose a microfluidic channel. The plurality of openings are within a recessed area of the microfluidics chip, the recess defining a surface onto which a sensor die can be clamped. The surface can include a clamping bump that contacts a membrane of a solid-state chemical sensor. The surface can also include a glue stop that, in some embodiments, can act as a spacer to prevent over-compression of the sensor die as it is clamped onto the microfluidic chip. The microfluidic chip can include a rigid structure, such as a printed circuit board, that is affixed to a top surface of the microfluidic chip. The rigid structure can include contact pads that are electrically connected to sensor electrodes on the sensor die by a wire.
    Type: Application
    Filed: November 1, 2019
    Publication date: May 7, 2020
    Applicant: e-SENS, Inc.
    Inventors: Richard B. Brown, Ondrej Novak
  • Publication number: 20200018718
    Abstract: Sensor devices and systems can include a silicon substrate comprising a sensor-side and a backside. The backside can include a backside electrode. The sensor-side can include a chemical sensor. The chemical sensor can include a chemical sensor electrode, the chemical sensor electrode can be electrically coupled to the backside electrode by a through-silicon via (TSV), the TSV being physically and electrically connected to the chemical sensor electrode and extending from the chemical sensor electrode through the silicon substrate towards the backside. The TSV can electrically connect the chemical sensor to the backside electrode. A printed circuit board can surround the sensor device and can include a metal contact pad. The metal contact pad can be electrically coupled to the backside electrode by a wire bond. The sensor-side can include a polymeric membrane covering the chemical sensor.
    Type: Application
    Filed: July 22, 2019
    Publication date: January 16, 2020
    Applicant: e-SENS, Inc.
    Inventors: Richard B. Brown, Ondrej Novak
  • Patent number: 10464063
    Abstract: Aspects of the embodiments are directed to a microfluidic chip that includes a plurality of openings to expose a microfluidic channel. The plurality of openings are within a recessed area of the microfluidics chip, the recess defining a surface onto which a sensor die can be clamped. The surface can include a clamping bump that contacts a membrane of a solid-state chemical sensor. The surface can also include a glue stop that, in some embodiments, can act as a spacer to prevent over-compression of the sensor die as it is clamped onto the microfluidic chip. The microfluidic chip can include a rigid structure, such as a printed circuit board, that is affixed to a top surface of the microfluidic chip. The rigid structure can include contact pads that are electrically connected to sensor electrodes on the sensor die by a wire.
    Type: Grant
    Filed: April 7, 2017
    Date of Patent: November 5, 2019
    Assignee: e-SENS, Inc.
    Inventors: Richard B. Brown, Ondrej Novak
  • Patent number: 10359391
    Abstract: Embodiments are directed to a chemical sensor and a method of fabricating a chemical sensor that includes a membrane having full circumferential adhesion. The chemical sensor device includes a silicon substrate comprising a sensor-side and a backside. The sensor-side includes a sensor-side electrode; a first passivation layer disposed on the substrate; and a second passivation layer on the first passivation layer and adjacent to the sensor-side electrode, the passivation layer comprising an adhesion trench exposing a portion of the first passivation layer, and a polyimide ring disposed on the second passivation layer. The backside includes a backside electrode on the backside of the substrate. The substrate includes an electrically isolated doped region, such as a through silicon via, electrically connecting the sensor-side electrode and the backside electrode.
    Type: Grant
    Filed: July 7, 2016
    Date of Patent: July 23, 2019
    Assignee: e-SENS, Inc.
    Inventors: Richard B. Brown, Ondrej Novak
  • Publication number: 20190083980
    Abstract: Aspects of the embodiments are directed to a microfluidic chip and methods of making the same. The microfluidic chip can include a sensor device residing on the microfluidic chip, the sensor-side comprising a chemical sensor and the backside including a backside electrode, the chemical sensor electrically coupled to the backside electrode by a via; a microfluidics channel in the microfluidic chip, the sensor-side of the sensor device facing the microfluidics channel; and a metal contact electrically connected to the backside electrode.
    Type: Application
    Filed: September 20, 2017
    Publication date: March 21, 2019
    Inventors: Richard B. Brown, Ondrej Novak
  • Publication number: 20180290137
    Abstract: Aspects of the embodiments are directed to a microfluidic chip that includes a plurality of openings to expose a microfluidic channel. The plurality of openings are within a recessed area of the microfluidics chip, the recess defining a surface onto which a sensor die can be clamped. The surface can include a clamping bump that contacts a membrane of a solid-state chemical sensor. The surface can also include a glue stop that, in some embodiments, can act as a spacer to prevent over-compression of the sensor die as it is clamped onto the microfluidic chip. The microfluidic chip can include a rigid structure, such as a printed circuit board, that is affixed to a top surface of the microfluidic chip. The rigid structure can include contact pads that are electrically connected to sensor electrodes on the sensor die by a wire.
    Type: Application
    Filed: April 7, 2017
    Publication date: October 11, 2018
    Inventors: Richard B. Brown, Ondrej Novak
  • Publication number: 20180011046
    Abstract: Embodiments are directed to a chemical sensor and a method of fabricating a chemical sensor that includes a membrane having full circumferential adhesion. The chemical sensor device includes a silicon substrate comprising a sensor-side and a backside. The sensor-side includes a sensor-side electrode; a first passivation layer disposed on the substrate; and a second passivation layer on the first passivation layer and adjacent to the sensor-side electrode, the passivation layer comprising an adhesion trench exposing a portion of the first passivation layer, and a polyimide ring disposed on the second passivation layer. The backside includes a backside electrode on the backside of the substrate. The substrate includes an electrically isolated doped region, such as a through silicon via, electrically connecting the sensor-side electrode and the backside electrode.
    Type: Application
    Filed: July 7, 2016
    Publication date: January 11, 2018
    Inventors: Richard B. Brown, Ondrej Novak
  • Patent number: 8123922
    Abstract: Nanopore based ion-selective electrodes and methods of their manufacture as well as methods for their use are disclosed and described. The nanopore based ion-selective electrode can include a pore being present in a solid material and having a nanosize opening in the solid material, a metal conductor disposed inside the pore opposite the opening in the solid material, a reference electrode material contacting said metal conductor and disposed inside the pore, a conductive composition in contact with the reference electrode and disposed in the pore, and an ion-selective membrane. The ion-selective membrane can be configured to isolate the metal conductor, reference electrode material, and conductive composition together within the pore.
    Type: Grant
    Filed: September 7, 2007
    Date of Patent: February 28, 2012
    Assignee: University of Utah Research Foundation
    Inventors: Henry S. White, Ryan J. White, Richard B. Brown, Hakhyun Nam, Jun Ho Shim
  • Publication number: 20100038243
    Abstract: Nanopore based ion-selective electrodes and methods of their manufacture as well as methods for their use are disclosed and described. The nanopore based ion-selective electrode can include a pore being present in a solid material and having a nanosize opening in the solid material, a metal conductor disposed inside the pore opposite the opening in the solid material, a reference electrode material contacting said metal conductor and disposed inside the pore, a conductive composition in contact with the reference electrode and disposed in the pore, and an ion-selective membrane. The ion-selective membrane can be configured to isolate the metal conductor, reference electrode material, and conductive composition together within the pore.
    Type: Application
    Filed: September 7, 2007
    Publication date: February 18, 2010
    Inventors: Henry S. White, Ryan J. White, Richard B. Brown, Hakhyun Nam, Jun Ho Shim
  • Patent number: 7438851
    Abstract: A micromachined device such as a solid-state liquid chemical sensor for receiving and retaining a plurality of separate liquid droplets at desired sites, a method of making the device and a method of using the device are provided. The technique works for both aqueous and solvent-based solutions. The device includes a substrate having an upper surface, and a first set of three-dimensional, thin film well rings patterned at the upper surface of the substrate. Each of the wells is capable of receiving and retaining a known quantity of liquid at one of the desired sites through surface tension. A method for patterning a membrane/solvent solution results in reproducibly-sized, uniformly-thick membranes. The patterning precision of this method allows one to place the membranes closer together, making the sensors smaller and less expensive, and the uniform film thickness imparts reproducibility to the sensors.
    Type: Grant
    Filed: April 30, 2004
    Date of Patent: October 21, 2008
    Assignee: The Regents of the University of Michigan
    Inventors: Robert W. Hower, Richard B. Brown
  • Patent number: 7291310
    Abstract: A microsystem for determining clotting time of blood and a low-cost, single-use device for use therein are provided wherein the device has no moving parts or expensive optical sensors or magnets. The device includes a microfluidic channel and a microsensor at least partially in fluid communication with the channel. By analyzing changes in the sensor as a drop of blood flows down the microfluidic channel, the time at which the blood clots can be determined.
    Type: Grant
    Filed: December 16, 2003
    Date of Patent: November 6, 2007
    Assignee: The Regents of the University of Michigan
    Inventors: Steven M. Martin, Roy H. Olsson, III, Richard B. Brown, Robert K. Franklin
  • Patent number: 7157984
    Abstract: MEMS-based, computer system, clock generation and oscillator circuits and LC-tank apparatus for use therein are provided and which are fabricated using a CMOS-compatible process. A micromachined inductor (L) and a pair of varactors (C) are developed in metal layers on a silicon substrate to realize the high quality factor LC-tank apparatus. This micromachined LC-tank apparatus is incorporated with CMOS transistor circuitry in order to realize a digital, tunable, low phase jitter, and low power clock, or time base, for synchronous integrated circuits. The synthesized clock signal can be divided down with digital circuitry from several GHz to tens of MHZ—a systemic approach that substantially improves stability as compared to the state of the art. Advanced circuit design techniques have been utilized to minimize power consumption and mitigate transistor flicker noise upconversion, thus enhancing clock stability.
    Type: Grant
    Filed: October 28, 2005
    Date of Patent: January 2, 2007
    Assignee: The Regents of the University of Michigan
    Inventors: Michael S. McCorquodale, Richard B. Brown
  • Patent number: 7132874
    Abstract: An apparatus and method are disclosed which provide a substantially linear relationship between an input signal, such as an input voltage or current, and a predetermined parameter, such as a frequency response or capacitance of a parallel plate capacitor or varactor. The apparatus comprises a square root converter and a logarithmic generator. The square root converter is adapted to provide a square root signal which is substantially proportional to a square root of the input signal. In the various embodiments, the logarithmic generator is adapted to provide an applied signal which is substantially proportional to a sum of a logarithm of the input signal plus the square root of the input signal. The applied signal is a pre-distorted signal which generally has a non-linear relation to the predetermined parameter and which, when applied, allows the predetermined parameter to vary substantially linearly with the input signal.
    Type: Grant
    Filed: April 22, 2004
    Date of Patent: November 7, 2006
    Assignee: The Regents of the University of Michigan
    Inventors: Michael S. McCorquodale, Richard B. Brown, Mei Kim Ding
  • Patent number: 7113048
    Abstract: A pseudo Set/Reset latch circuit is configured with modified NOR or NAND gates wherein one of the series pull-up devices or pull-down devices is removed. A minimum of three pseudo Set/Reset latches may be coupled as a ring oscillator generating an output and a non-skewed complementary output. Additionally, feed-forward inverting stages may be coupled in parallel with inverting paths in the ring oscillator primary path to further increase the frequency range of the ring oscillator. The pseudo Set/Reset latch circuits and the feed-forward inverting stages may be configured with voltage controlled devices that alter the delay of the stages as a means for varying the frequency of the ring oscillator either by varying the current drive of the circuitry driving the output of the latch stages or by varying the conductance of devices coupling between the latch stages. Feedforward inverting stages may comprise pseudo latches or inverter gates.
    Type: Grant
    Filed: November 12, 2004
    Date of Patent: September 26, 2006
    Assignee: International Business Machines Corporation
    Inventors: Richard B. Brown, Gary D. Carpenter, Fadi H. Gebara
  • Patent number: 6972635
    Abstract: MEMS-based, computer system, clock generation and oscillator circuits and LC-tank apparatus for use therein are provided and which are fabricated using a CMOS-compatible process. A micromachined inductor (L) and a pair of varactors (C) are developed in metal layers on a silicon substrate to realize the high quality factor LC-tank apparatus. This micromachined LC-tank apparatus is incorporated with CMOS transistor circuitry in order to realize a digital, tunable, low phase jitter, and low power clock, or time base, for synchronous integrated circuits. The synthesized clock signal can be divided down with digital circuitry from several GHz to tens of MHz—a systemic approach that substantially improves stability as compared to the state of the art. Advanced circuit design techniques have been utilized to minimize power consumption and mitigate transistor flicker noise upconversion, thus enhancing clock stability.
    Type: Grant
    Filed: February 26, 2003
    Date of Patent: December 6, 2005
    Assignee: The Regents of the University of Michigan
    Inventors: Michael S. McCorquodale, Richard B. Brown
  • Patent number: 6952113
    Abstract: A multi-threshold integrated circuit (IC) with reduced subthreshold leakage and method of reducing leakage. Selectable supply switching devices (NFETs and/or PFETs) between a logic circuit and supply connections (Vdd and Ground) for the circuit have higher thresholds than normal circuit devices. Some devices may have thresholds lowered when the supply switching devices are on. Header/footer devices with further higher threshold voltages and widths may be used to further increase off resistance and maintain/reduce on resistance. Alternatively, high threshold devices may be stacked to further reduce leakage to a point achieved for an even higher threshold. Intermediate supply connects at the devices may have decoupling capacitance and devices may be tapered for optimum stack height and an optimum taper ratio to minimize circuit leakage and circuit delay.
    Type: Grant
    Filed: August 20, 2003
    Date of Patent: October 4, 2005
    Assignee: International Business Machines Corp.
    Inventors: Richard B. Brown, Ching-Te K. Chuang, Peter W. Cook, Koushik K. Das, Rajiv V. Joshi
  • Patent number: 6933744
    Abstract: An integrated circuit is disclosed that includes one or more blocks of switching logic (comprised of transistors) connected between a power supply and a common node. A control transistor connects the common node to ground. The control transistor has a higher threshold voltage level than the voltage threshold level(s) of the transistors that comprise the switching logic blocks. A bias generator provides a positive bias to the body of the control transistor when the control transistor is “on.” Further disclosed is an integrated circuit comprising a first plurality of serially connected transistors establishing a first current path from a voltage source to ground and a second plurality of serially connected transistors establishing a second current path from the voltage source to ground. The first and second plurality of transistors each includes at least one high-threshold transistor.
    Type: Grant
    Filed: June 10, 2003
    Date of Patent: August 23, 2005
    Assignee: The Regents of the University of Michigan
    Inventors: Koushik K. Das, Richard B. Brown