Abstract: A composite signal is transmitted via a transmission line to an x, y, z display device. The composite signal contains in each of a plurality of predetermined time intervals an identifiable signal. The first signal of said composite signal is a synchronizing start signal. The other signals contain varying information. In the display device there are generated an x-, a y- and a z-coordinate signal. These coordinate signals are generated such that in said predetermined time intervals with reference to the synchronizing start signal and in predetermined varying combinations two of these three coordinate signals are developed and determined by the display device, whereas the remaining third coordinate signal is developed by the display device, but is determined from one of the other signals of the composite signal received via the transmission line.

Abstract: A signal processing apparatus comprises a main unit having a frame, and a plurality of modules for processing analog signals replaceably inserted into said frame. Each of the modules has an analog-to-digital converter for the analog signals and an identification signal generator which generates a module identification signal different for each module. The main unit comprises a signal processing system and a conversion pulse clock generator. The latter one clocks each analog-to-digital converter in each module to convert analog signals to digital data. The digital data are transmitted together with the module identification signal to the signal processing system.

Abstract: The apparatus contains a microprocessor circuit, which comprises a preprocessor which is not DMA-capable in itself and a DMA-capable central processor. Both processors can be made to communicate with each other by means of a main memory. This is performed by temporarily cutting off the communication path between said DMA-capable central processor and said main memory, specifically by an artificial DMA request via the address line of said preprocessor, and by establishing instead a communication path between said preprocessor and said main memory. The communication of said preprocessor with said main memory is started after said central processor has sent a return message signal to said preprocessor, whereby it confirms that its own communication with said main memory is completed.

Abstract: The system contains a number of monitoring devices, such as bedside units for monitoring parameters of patients, and a central station in star connection. Each monitoring device contains a signal generator and a display device for the display of monitored parameters. The central station contains a central display device and a central multiplexer. The multiplexer has a separate signal input for receiving the output signals of each signal generator, and a first and second number of multiplexer outputs. The output signals of the signal generators each contain undelayed and delayed signal data. The first multiplexer outputs can be connected to the central display device. Thereby, the undelayed signal data contained in the output signals of selected monitoring devices can be displayed in the central station. These signal data represent all parameters monitored by the selected device.