Abstract: A system has a central processing unit (CPU) and a graphics processing unit (GPU) that includes one or more registers. The GPU can change a resource descriptor in one of the GPU's registers. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

Abstract: A method for processing graphics for a GPU program, translating instructions from a shading language into an intermediate language with a front end of a GPU compiler; translating the instructions from the intermediate language into a GPU object language with a back end of the GPU compiler; wherein the instructions in the shading language include instructions defining a layout of resources for the GPU program.

Abstract: Systems and methods for processing three-dimensional graphics depicting a sequence of motion with an enhanced illusion of depth are described. The graphics may include three-dimensional content mapped to a two dimensional viewing window with an additional reference image rendered onto the viewing window. The reference image may be defined at one or more portions of the viewing window and rendered as occluding the content or being occluded by the content depending on the depth of the content at each portion of the viewing window.

Abstract: A method for processing graphics for a GPU program, translating instructions from a shading language into an intermediate language with a front end of a GPU compiler; translating the instructions from the intermediate language into a GPU object language with a back end of the GPU compiler; wherein the instructions in the shading language include instructions defining a layout of resources for the GPU program.

Abstract: A system has a central processing unit (CPU) and a graphics processing unit (GPU) that includes one or more registers. The GPU can change a resource descriptor in one of the GPU's registers. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

Abstract: Task and data management systems methods and apparatus are disclosed. A processor event that requires more memory space than is available in a local storage of a co-processor is divided into two or more segments. Each segment has a segment size that is less than or the same as an amount of memory space available in the local storage. The segments are processed with one or more co-processors to produce two or more corresponding outputs. The two or more outputs are associated into one or more groups. Each group is less than or equal to a target data size associated with a subsequent process.

Abstract: Methods copying data from one location to another in a main memory of a cell processor are disclosed. A portion of the data is transferred a first main memory location to the local store of one or more SPU and then transferred from the local store to a second main memory location.

Abstract: Cell processor task management in a cell processor having a main memory, one or more power processor units (PPU) and one or more synergistic processing units (SPU), each SPU having a processor and a local memory is described. An SPU task manager (STM) running on one or more of the SPUs reads one or more task definitions stored in the main memory into the local memory of a selected SPU. Based on information contained in the task definitions the SPU loads code and/or data related to the task definitions from the main memory into the local memory associated with the selected SPU. The selected SPU then performs one or more tasks using the code and/or data.

Abstract: Task and data management systems methods and apparatus are disclosed. A processor event that requires more memory space than is available in a local storage of a co-processor is divided into two or more segments. Each segment has a segment size that is less than or the same as an amount of memory space available in the local storage. The segments are processed with one or more co-processors to produce two or more corresponding outputs. The two or more outputs are associated into one or more groups. Each group is less than or equal to a target data size associated with a subsequent process.

Abstract: Task and data management systems methods and apparatus are disclosed. A processor event that requires more memory space than is available in a local storage of a co-processor is divided into two or more segments. Each segment has a segment size that is less than or the same as an amount of memory space available in the local storage. The segments are processed with one or more co-processors to produce two or more corresponding outputs.

Abstract: Methods copying data from one location to another in a main memory of a cell processor are disclosed. A portion of the data is transferred a first main memory location to the local store of one or more SPU and then transferred from the local store to a second main memory location.

Abstract: Task and data management systems methods and apparatus are disclosed. A processor event that requires more memory space than is available in a local storage of a co-processor is divided into two or more segments. Each segment has a segment size that is less than or the same as an amount of memory space available in the local storage. The segments are processed with one or more co-processors to produce two or more corresponding outputs.

Abstract: Cell processor task and data management systems methods and apparatus are disclosed. A cell processor divides an event that event requires more memory space than is available in a local storage of a synergistic processing element (SPE) into two or more segments. Each segment has a segment size that is less than or the same as an amount of memory space available in the local storage. The segments are processed with one or more SPE of the cell processor to produce two or more corresponding outputs.

Abstract: Methods copying data from one location to another in a main memory of a cell processor are disclosed. A portion of the data is transferred a first main memory location to the local store of one or more SPU and then transferred from the local store to a second main memory location.