Abstract: One embodiment of the present invention includes a system for communicating data comprising a device containing a flow-through buffer having a buffer capacity, a first data transport medium coupled to the device and a target coupled to the first data transport medium. The target device can be configured to, receive a data request from the device, send an initial set of data to the device that is smaller than the buffer capacity, delay a predetermined delay period, and send additional data to the device when the delay period has elapsed. By adjusting the amount of data sent in the initial data set and the delay period overfilling, and premature emptying of the flow-through buffer can be prevented or reduced.

Abstract: Systems and methods for enabling data transfers over communications links having a plurality of transmission lanes. In one embodiment, a system comprises a plurality of elastic buffers, each of which is coupled to one of the lanes in the communications link, and a buffer controller coupled to the buffers. Data is clocked into the elastic buffers using a first clock signal and is clocked out of the buffers by a second clock signal. The buffer controller is configured to monitor each of the buffers and to detect impending underflow or overflow conditions. In response to detect in one of these conditions, the buffer controller will cause the words to be added or deleted, respectively, to all of the elastic buffers rather than only the buffer in which the overflow/underflow condition was detected.

Abstract: Systems and methods for enabling data transfers over communications links having a plurality of lanes, wherein the lanes may have different transmission lengths (times.) In one embodiment, a plurality of buffers are each coupled to corresponding transmission lanes in a communications link. Each buffer is configured to reset corresponding read and write pointers to predetermined initial positions after a reset event. The pointers are kept in these positions until a test sequence symbol which is transmitted across the corresponding lane is received. When the test sequence symbol is received, the buffer begins to advance the associated write pointer with each received piece of data. After all of the buffers have received corresponding test sequence symbols, data is read out of the buffers, and the read pointers are advanced accordingly.