Patents by Inventor Richard B. Webb

Richard B. Webb has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11918837
    Abstract: There is provided a fit testing method comprising: providing a respirator donned by a wearer; providing a sensor in electrical communication with a sensing element, where the sensor is configured to monitor a particulate concentration parameter of a gas space within the respirator, and a second particulate concentration parameter of a gas space outside the respirator, where the sensor is attached to the respirator such that the respirator such that the weight of the sensor is supported by the respirator; and providing a reader configured to communicate with the sensor, where the reader is configured to provide a respirator fit parameter based on a comparison of the particulate concentration within the respirator to the particulate concentration parameter outside the respirator.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: March 5, 2024
    Assignee: 3M Innovative Properties Company
    Inventors: Richard C. Webb, Andrew S. Viner, Daniel B. Taylor, Jessica L. T. Hauge, Jennifer L. Kamarainen, Jacob P. Vanderheyden, Silvia G. Guttmann, Kenneth B. L. Stanford
  • Patent number: 7970125
    Abstract: In one embodiment, the present invention includes an operational amplifier having a first input to receive a first current formed of an input current and an offset current. A first MOSFET device having a gate terminal may be coupled to an output of the operational amplifier. An output stack including one or more cascoded devices to provide an output current corresponding to a gain of the operational amplifier may be coupled to a first terminal of the first MOSFET device. The operational amplifier may be used in various circuitry, such as a subscriber line interface circuit (SLIC).
    Type: Grant
    Filed: June 15, 2006
    Date of Patent: June 28, 2011
    Assignee: Silicon Laboratories Inc.
    Inventors: Russell J. Apfel, Richard B. Webb
  • Patent number: 7715165
    Abstract: A powered device includes a first supply terminal, a second supply terminal, and at least one input pin coupled to the first supply terminal. The powered device further includes an external capacitor having a first terminal coupled to the first supply terminal, a switch coupled to the second supply terminal and coupled to a second terminal of the external capacitor, and power surge detection logic coupled to the switch. The external capacitor is charged in response to a detected power surge that exceeds a threshold.
    Type: Grant
    Filed: July 11, 2006
    Date of Patent: May 11, 2010
    Assignee: Silicon Laboratories, Inc.
    Inventors: John Gammel, Richard B. Webb, D. Matthew Landry
  • Patent number: 7541790
    Abstract: In one embodiment, the present invention includes a regulator having a pulse width modulation (PWM) controller to generate a PWM control signal based on a voltage level of a load coupled to the regulator, a driver to provide a drive signal to a switching element of the regulator responsive to the PWM control signal, and a power saver coupled between the PWM controller and the driver to receive the PWM control signal and to output the PWM control signal to the driver at a reduced rate during an idle mode of the load.
    Type: Grant
    Filed: June 9, 2006
    Date of Patent: June 2, 2009
    Assignee: Silicon Laboratories Inc.
    Inventors: Walter S. Schopfer, Richard B. Webb
  • Patent number: 7511388
    Abstract: A powered device includes a power supply input, a diode bridge, and a power loss detector. The power supply input is responsive to an external power source. The diode bridge has an input to receive at least one power supply input. The power loss detector includes an input responsive to the power supply input. The power loss detector is adapted to detect a power loss event and to initiate a power shutdown. In one embodiment, the powered device includes a load circuit to receive a power supply voltage from the diode bridge. The load circuit is responsive to the power loss detector to perform a power shutdown operation.
    Type: Grant
    Filed: June 6, 2006
    Date of Patent: March 31, 2009
    Assignee: Silicon Laboratories, Inc.
    Inventors: Richard B. Webb, D. Matthew Landry
  • Publication number: 20080013243
    Abstract: A powered device includes a first supply terminal, a second supply terminal, and at least one input pin coupled to the first supply terminal. The powered device further includes an external capacitor having a first terminal coupled to the first supply terminal, a switch coupled to the second supply terminal and coupled to a second terminal of the external capacitor, and power surge detection logic coupled to the switch. The external capacitor is charged in response to a detected power surge that exceeds a threshold.
    Type: Application
    Filed: July 11, 2006
    Publication date: January 17, 2008
    Applicant: Silicon Laboratories, Inc.
    Inventors: John Gammel, Richard B. Webb, D. Matthew Landry
  • Publication number: 20070291930
    Abstract: In one embodiment, the present invention includes an operational amplifier having a first input to receive a first current formed of an input current and an offset current. A first MOSFET device having a gate terminal may be coupled to an output of the operational amplifier. An output stack including one or more cascoded devices to provide an output current corresponding to a gain of the operational amplifier may be coupled to a first terminal of the first MOSFET device. The operational amplifier may be used in various circuitry, such as a subscriber line interface circuit (SLIC).
    Type: Application
    Filed: June 15, 2006
    Publication date: December 20, 2007
    Inventors: Russell J. Apfel, Richard B. Webb
  • Publication number: 20070285069
    Abstract: In one embodiment, the present invention includes a regulator having a pulse width modulation (PWM) controller to generate a PWM control signal based on a voltage level of a load coupled to the regulator, a driver to provide a drive signal to a switching element of the regulator responsive to the PWM control signal, and a power saver coupled between the PWM controller and the driver to receive the PWM control signal and to output the PWM control signal to the driver at a reduced rate during an idle mode of the load.
    Type: Application
    Filed: June 9, 2006
    Publication date: December 13, 2007
    Inventors: Walter S. Schopfer, Richard B. Webb
  • Publication number: 20070283173
    Abstract: A powered device includes a power supply input, a diode bridge, and a power loss detector. The power supply input is responsive to an external power source. The diode bridge has an input to receive at least one power supply input. The power loss detector includes an input responsive to the power supply input. The power loss detector is adapted to detect a power loss event and to initiate a power shutdown. In one embodiment, the powered device includes a load circuit to receive a power supply voltage from the diode bridge. The load circuit is responsive to the power loss detector to perform a power shutdown operation.
    Type: Application
    Filed: June 6, 2006
    Publication date: December 6, 2007
    Applicant: Silicon Laboratories, Inc.
    Inventors: Richard B. Webb, D. Matthew Landry
  • Patent number: 6356624
    Abstract: A sensor capable of being coupled to a transmission line and monitoring a foreign voltage on the transmission line includes a voltage monitoring circuit. The voltage monitoring circuit is adapted to operate in a foreign voltage detection mode in response to receiving a first logic signal and a foreign voltage measurement mode in response to receiving a second logic signal. A method for operating a circuit to detect and measure a foreign voltage on a transmission line includes providing a first logic signal to configure the circuit to detect the foreign voltage. The foreign voltage is detected on the transmission line in the circuit. A second logic signal is provided to configure the circuit to measure the foreign voltage, and the foreign voltage is measured.
    Type: Grant
    Filed: August 4, 1998
    Date of Patent: March 12, 2002
    Assignee: Leserity, Inc.
    Inventors: Russell J. Apfel, Richard B. Webb, Walter S. Schopfer