Patents by Inventor Richard Beaudry
Richard Beaudry has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240302736Abstract: A wafer including a mask on one face and at least one layer on an opposite face, wherein the mask has at least one scribeline which overlies at least a portion of the opposite face which is substantially free of the at least one layer is described. Also described is a method of preparing a pellicle, the method including: providing a wafer having a mask on one face and at least one layer on an opposite face, defining a scribeline in the mask, and selectively removing a portion of the at least one layer which at least partially overlies the scribeline as well as a method of preparing a pellicle, the method including: providing a pellicle core, and removing at least some material from at least one face of the pellicle core in a non-oxidizing environment. In any aspect, the pellicle may include a metal nitride layer.Type: ApplicationFiled: March 27, 2024Publication date: September 12, 2024Applicant: ASML NETHERLANDS B.V.Inventors: Dennis DE GRAAF, Richard BEAUDRY, Maxime BIRON, Paul JANSSEN, Thijs KATER, Kevin KORNELSEN, Michael Alfred Josephus KUIJKEN, Jan Hendrik Willem KUNTZEL, Stephane MARTEL, Maxim Aleksandrovich NASALEVICH, Guido SALMASO, Pieter-Jan VAN ZWOL
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Publication number: 20240183663Abstract: An optical ring resonator-based gyroscope includes a photonic integrated circuit (PIC) chip including a plurality of optical elements, the plurality of optical elements including a resonator ring; and a printed circuit board including a plurality of electrical components, the photonic integrated circuit being mounted on a surface of the printed circuit board, the photonic integrated circuit and the printed circuit board being electrically connected. A photonic integrated circuit (PIC) chip including a substrate; a dielectric layer; a first waveguide layer forming at least: a ring resonator and reflector portions; a second waveguide layer forming at least: vertical Bragg grating couplers disposed over one of the plurality of reflector portions, a chip waveguide; a magneto-optic layer encapsulated in the dielectric layer; and a metal layer forming a plurality of metal connection pads and a plurality of wire traces for electrically connecting the PIC chip to electronic components.Type: ApplicationFiled: January 11, 2022Publication date: June 6, 2024Inventors: Kazem ZANDI, Richard BEAUDRY
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Patent number: 11977326Abstract: A wafer including a mask on one face and at least one layer on an opposite face, wherein the mask has at least one scribeline which overlies at least a portion of the opposite face which is substantially free of the at least one layer is described. Also described is a method of preparing a pellicle, the method including: providing a wafer having a mask on one face and at least one layer on an opposite face, defining a scribeline in the mask, and selectively removing a portion of the at least one layer which at least partially overlies the scribeline as well as a method of preparing a pellicle, the method including: providing a pellicle core, and removing at least some material from at least one face of the pellicle core in a non-oxidising environment. In any aspect, the pellicle may include a metal nitride layer.Type: GrantFiled: April 12, 2019Date of Patent: May 7, 2024Assignee: ASML NETHERLANDS B.V.Inventors: Dennis De Graaf, Richard Beaudry, Maxime Biron, Paul Janssen, Thijs Kater, Kevin Kornelsen, Michael Alfred Josephus Kuijken, Jan Hendrik Willem Kuntzel, Stephane Martel, Maxim Aleksandrovich Nasalevich, Guido Salmaso, Pieter-Jan Van Zwol
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Publication number: 20240143957Abstract: Various systems and methods for imprinting a unique identifier on a semiconductor die are disclosed herein. Example embodiments involve receiving a substrate at a photolithography station, the substrate including a photosensitive layer and an area for forming semiconductor dies, forming circuits on the substrate using a photolithography mask, imprinting a unique identifier on each semiconductor die on the substrate using a digital photomask and removing the substrate containing the semiconductor dies containing the circuits and the unique identifiers from the photolithography station. In some embodiments, each unique identifier is associated with a unique record for recording characteristics of the substrate, of the semiconductor die and of the unique identifier. In some embodiments, the digital photomask includes dynamically-controlled pixels, controllable to define a unique pattern for each unique identifier. In some embodiments, the unique identifier is a two-dimensional code.Type: ApplicationFiled: January 5, 2023Publication date: May 2, 2024Applicant: Digitho Technologies Inc.Inventors: Richard BEAUDRY, Cédric Canu, Maurice Delafosse
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Patent number: 11934091Abstract: A photolithography mask (10) is provided, said photolithography mask (10) including a plate (15) or an empty frame matrix, a surface of the plate (15) or empty frame matrix including an array of micro-pixels (20), wherein each micro-pixel (20) is independently controllable using an on-board micro-controller (25) in such a manner that a pattern can be generated with the array of micro-pixels (20).Type: GrantFiled: March 31, 2022Date of Patent: March 19, 2024Assignee: TECHNOLOGIES DIGITHO INC.Inventor: Richard Beaudry
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Publication number: 20240085776Abstract: A photolithography mask (10) is provided, said photolithography mask (10) including a plate (15) or an empty frame matrix, a surface of the plate (15) or empty frame matrix including an array of micro-pixels (20), wherein each micro-pixel (20) is independently controllable using an on-board micro-controller (25) in such a manner that a pattern can be generated with the array of micro-pixels (20).Type: ApplicationFiled: March 31, 2022Publication date: March 14, 2024Inventor: Richard BEAUDRY
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Publication number: 20210240070Abstract: A wafer including a mask on one face and at least one layer on an opposite face, wherein the mask has at least one scribeline which overlies at least a portion of the opposite face which is substantially free of the at least one layer is described. Also described is a method of preparing a pellicle, the method including: providing a wafer having a mask on one face and at least one layer on an opposite face, defining a scribeline in the mask, and selectively removing a portion of the at least one layer which at least partially overlies the scribeline as well as a method of preparing a pellicle, the method including: providing a pellicle core, and removing at least some material from at least one face of the pellicle core in a non-oxidising environment. In any aspect, the pellicle may include a metal nitride layer.Type: ApplicationFiled: April 12, 2019Publication date: August 5, 2021Applicant: ASML NETHERLANDS B.V.Inventors: Dennis DE GRAAF, Richard BEAUDRY, Maxime BIRON, Paul JANSSEN, Thijs KATER, Kevin KORNELSEN, Michael Alfred Josephus KUIJKEN, Jan Hendrik Willem KUNTZEL, Stephane MARTEL, Maxim Aleksandrovich NASALEVICH, Guido SALMASO, Pieter-Jan VAN ZWOL
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Publication number: 20120153839Abstract: A device and method that automatically corrects the color of a dome light display device. An dome light display device may include one or more colored light emitting diodes (LEDs) arranged in a row, a photodetector disposed with the one or more LEDs in the row and a measurement circuit is configured to receive an electrical signal from the photodetector and compare the electrical signal to a reference signal associated with an intensity of light for a particular color of light and adjust the intensity of light emitted from the one or more LEDs based on the reference value.Type: ApplicationFiled: December 17, 2010Publication date: June 21, 2012Applicant: SIMPLEXGRINNELL LPInventors: Joseph D. Farley, Carl J. Silkey, Richard Beaudry
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Publication number: 20090242512Abstract: In a method of performing an anisotropic etch on a substrate in an inductively coupled plasma etch chamber, at least three cycles of a procedure consisting essentially of the four following steps are performed: a. depositing a protective polymer on a patterned substrate; b. performing a first low pressure etch to partially remove the deposited protective polymer at a pressure less than 40 mTorr; c. performing a high pressure etch at a pressure between between 40 mT and 1000 mT to form a portion of a trench in the substrate; and d. performing a second low pressure etch at a pressure less than 40 MTorr to reduce surface roughness. This method permits the fabrication of deep trenches with reduced surface roughness.Type: ApplicationFiled: March 24, 2009Publication date: October 1, 2009Applicant: DALSA SEMICONDUCTOR INC.Inventor: Richard Beaudry
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Patent number: 7439093Abstract: A method of making an etch structure in a substrate involves the steps of providing a mask on a substrate with a pattern that leaves at least one opening leaving the substrate in direct contact with the ambient, performing an isotropic or quasi-isotropic etch through a mask to create a cavity under the mask, which mask is left behind as a suspended membrane above the cavity; and performing a subsequent anisotropic etch that etches anisotropically the pattern of the mask in the bottom of the cavity.Type: GrantFiled: September 16, 2005Date of Patent: October 21, 2008Assignee: DALSA Semiconductor Inc.Inventor: Richard Beaudry
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Publication number: 20070065967Abstract: A method of making an etch structure in a substrate involves the steps of providing a mask on a substrate with a pattern that leaves at least one opening leaving the substrate in direct contact with the ambient, performing an isotropic or quasi-isotropic etch through a mask to create a cavity under the mask, which mask is left behind as a suspended membrane above the cavity; and performing a subsequent anisotropic etch that etches anisotropically the pattern of the mask in the bottom of the cavity.Type: ApplicationFiled: September 16, 2005Publication date: March 22, 2007Applicant: DALSA Semiconductor Inc.Inventor: Richard Beaudry