Patents by Inventor Richard Billings Merrill

Richard Billings Merrill has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6326314
    Abstract: The high Q inductor process for reducing substrate interaction of integrated inductors includes etching away some of the silicon substrate after the inductor has been formed on the substrate. A first etch process is performed to form an opening in the center of the inductor exposing the silicon substrate. A second etch process is performed to etch the exposed silicon substrate to form a trench in the silicon substrate. A third etch process is performed to etch the trench into an inverted pyramidal cavity within the substrate and extending beneath the inductor. The pyramidal cavity is then filled with a solution, such as spin-on-glass thereby providing mechanical support for the inductor.
    Type: Grant
    Filed: September 18, 1997
    Date of Patent: December 4, 2001
    Assignee: National Semiconductor Corporation
    Inventors: Richard Billings Merrill, Tsung-Wen Lee
  • Patent number: 6297689
    Abstract: Apparatus for storing voltage on an Erasable Programmable Read-Only Memory (EPROM) buffered through an input voltage follower circuit provides an architecturally simple and efficient low temperature coefficient, low power, programmable complementary metal oxide semiconductor voltage reference.
    Type: Grant
    Filed: February 3, 1999
    Date of Patent: October 2, 2001
    Assignee: National Semiconductor Corporation
    Inventor: Richard Billings Merrill
  • Patent number: 6180983
    Abstract: High-voltage n-channel and p-channel MOS transistors are formed on an insulated wafer, such as a silicon-on-insulator wafer. The heavily-doped area of the drain region is separated from the channel region by a lighter-doped area of the drain region which has a lateral width which is substantially greater than the lateral width of the sidewall spacers formed adjacent to the gates of the spacers.
    Type: Grant
    Filed: July 17, 1998
    Date of Patent: January 30, 2001
    Assignee: National Semiconductor Corporation
    Inventor: Richard Billings Merrill
  • Patent number: 6175268
    Abstract: The accumulation of a small positive charge on the source of a MOS switch which occurs after the switch has been turned off due to the parasitic capacitance that exists between the gate and the source of the transistor, known as clock feedthrough, is reduced by utilizing a split-gate MOS transistor, and by continuously biasing one of the gates of the split-gate transistor.
    Type: Grant
    Filed: March 16, 1999
    Date of Patent: January 16, 2001
    Assignee: National Semiconductor Corporation
    Inventor: Richard Billings Merrill
  • Patent number: 6150683
    Abstract: The blue signal of a CMOS-based color pixel is increased with respect to the red and green signals by lowering the doping concentration of the surface regions of the pn-junction photodiodes that are used in the blue imaging cells with respect to the surface regions of the pn-junction photodiodes that are used in the red and green imaging cells.
    Type: Grant
    Filed: June 27, 1997
    Date of Patent: November 21, 2000
    Assignee: Foveon, Inc.
    Inventors: Richard Billings Merrill, Kevin Brehmer
  • Patent number: 6130713
    Abstract: An image cell having self-reset which provides improved dynamic range is achieved by having a reset circuit, a comparator circuit and a memory circuit. The image cell operates such that the comparator circuit compares the voltage potential of the image cell with a reference voltage potential. Once the comparator circuit senses that the voltage potential of the image cell transcends the reference voltage potential, the comparator circuit sends a reset signal to the reset circuit. The reset circuit then resets the image cell. Each time the image cell is reset, a reset value is stored in the memory circuit, and the sum of the reset values stored in the memory circuit corresponds to the number of times the image cell has been reset. By resetting the image cell a plurality of times, the dynamic range of a conventional image cell can be increased.
    Type: Grant
    Filed: June 27, 1997
    Date of Patent: October 10, 2000
    Assignee: Foveonics, Inc.
    Inventor: Richard Billings Merrill
  • Patent number: 6066510
    Abstract: The quantum efficiency of a photodiode is substantially increased by forming the photodiode on a heavily-doped layer of semiconductor material which, in turn, is formed on a semiconductor substrate. The heavily-doped layer of semiconductor material tends to repel information carriers in the photodiode from being lost to the substrate, and prevents noise carriers from the substrate from diffusing up into the photodiode. In addition, the red and blue photoresponses are balanced by adjusting the depth of the photodiode.
    Type: Grant
    Filed: May 5, 1998
    Date of Patent: May 23, 2000
    Assignee: Foveon, Inc.
    Inventor: Richard Billings Merrill
  • Patent number: 6018365
    Abstract: The dynamic range of an imaging system that utilizes an array of active pixel sensor cells is substantially increased by reading each cell in the array multiple times during each integration period. Each time a cell is read, the number of photons collected by the cell is saved and the cell is reset if the cell would normally saturate by the end of the integration period. At the end of the integration period, the number of photons collected by each cell is defined by the sum of the values collected during the integration period.
    Type: Grant
    Filed: March 5, 1999
    Date of Patent: January 25, 2000
    Assignee: Foveon, Inc.
    Inventor: Richard Billings Merrill
  • Patent number: 6011295
    Abstract: An active pixel image cell which includes a photosensor, active devices for control of the sensor and readout of a signal representing the intensity of light to which the sensor is exposed, and a neuron MOSFET transistor which "both amplifies the signal from the photosensor and" simulates the behavior of a human neuron. An integrated neural network and imaging array may be formed by interconnecting a group of such pixels. Digital signal processing algorithms used for image processing may be implemented at the pixel level by appropriate interconnections between the output signals from the photosensor of surrounding pixels and the neuron MOSFET.
    Type: Grant
    Filed: July 22, 1997
    Date of Patent: January 4, 2000
    Assignee: Foveonics, Inc.
    Inventors: Richard Billings Merrill, Albert Bergemont, Min-hwa Chi
  • Patent number: 6002432
    Abstract: The noise in the photo information extracted from an active pixel sensor cell is reduced by resetting the voltage on the photodiode of the cell to the power supply voltage, and by reading the cell immediately before and after the cell is reset. The voltage on the photodiode is reset to the power supply voltage by applying a reset voltage to the gate of the reset transistor conventionally used to reset the photodiode where the reset voltage is sufficiently larger than the power supply voltage to cause the voltage on the photodiode to be pulled up to the power supply voltage.
    Type: Grant
    Filed: September 10, 1996
    Date of Patent: December 14, 1999
    Assignee: Foveon, Inc.
    Inventors: Richard Billings Merrill, Kevin E. Brehmer
  • Patent number: 5970316
    Abstract: Isolation between the heavily-doped active regions of an active pixel sensor cell is provided by utilizing a series of isolation regions which have a doping concentration that is approximately equal to the doping concentration of a low-density drain (LDD) region. A first isolation region of the series, which has the same conductivity type as the active regions, is formed to adjoin a first active region. A second isolation region of the series, which has the opposite conductivity type as the active regions, is formed to adjoin the first isolation region. A third isolation region, which has the same conductivity type as the active regions, is formed to adjoin the second isolation region and a second active region.
    Type: Grant
    Filed: September 25, 1998
    Date of Patent: October 19, 1999
    Assignee: Foveon, Inc.
    Inventor: Richard Billings Merrill
  • Patent number: 5965875
    Abstract: A digital imager apparatus uses the differences in absorption length in silicon of light of different wavelengths for color separation. A preferred imaging array is based upon a three-color pixel sensor using a triple-well structure. The array results in elimination of color aliasing by measuring each of the three primary colors (RGB) in each pixel in the same location.
    Type: Grant
    Filed: April 24, 1998
    Date of Patent: October 12, 1999
    Assignee: Foveon, Inc.
    Inventor: Richard Billings Merrill
  • Patent number: 5962844
    Abstract: An active pixel image cell which includes a photosensor and an embedded memory element and may be used to produce signals corresponding to the photosensor outputs for successive frames. The structure of the active pixel cell includes an analog, non-volatile, or dynamic memory element and the control elements needed to store the output of the photosensor generated during a previous frame. The pixel elements then generate a signal representing the current frame output of the photosensor. The current frame output and previous frame output are then provided as output signals for the pixel and may be subjected to off-pixel processing as desired. For example, the two values may be subtracted from one another by an off-pixel difference amplifier to form a signal representing the difference between the image on the photodiode sensor of the pixel between successive frames. The difference signal may then be used for purposes of video compression, motion detection, or image stabilization.
    Type: Grant
    Filed: September 3, 1997
    Date of Patent: October 5, 1999
    Assignee: Foveon, Inc.
    Inventors: Richard Billings Merrill, Albert Bergemont, Min-hwa Chi
  • Patent number: 5900657
    Abstract: The accumulation of a small positive charge on the source of a MOS switch which occurs after the switch has been turned off due to the parasitic capacitance that exists between the gate and the source of the transistor, known as clock feedthrough, is reduced by utilizing a split-gate MOS transistor, and by continuously biasing one of the gates of the split-gate transistor.
    Type: Grant
    Filed: May 19, 1997
    Date of Patent: May 4, 1999
    Assignee: National Semiconductor Corp.
    Inventor: Richard Billings Merrill
  • Patent number: 5892253
    Abstract: In an active pixel sensor cell, the blue response of the cell is balanced by utilizing a photodiode in lieu of a photogate, and the noise is reduced by quickly reading the voltage on a node, transferring the collected charge from the photodiode onto the node, and then again reading the voltage on the node.
    Type: Grant
    Filed: March 26, 1997
    Date of Patent: April 6, 1999
    Assignee: Foveonics, Inc.
    Inventor: Richard Billings Merrill
  • Patent number: 5892541
    Abstract: The dynamic range of an imaging system that utilizes an array of active pixel sensor cells is substantially increased by reading each cell in the array multiple times during each integration period. Each time a cell is read, the number of photons collected by the cell is saved and the cell is reset if the cell would normally saturate by the end of the integration period. At the end of the integration period, the number of photons collected by each cell is defined by the sum of the values collected during the integration period.
    Type: Grant
    Filed: September 10, 1996
    Date of Patent: April 6, 1999
    Assignee: Foveonics, Inc.
    Inventor: Richard Billings Merrill
  • Patent number: 5886393
    Abstract: An integrated circuit package assembly is disclosed herein and includes at least one integrated circuit chip having a plurality of chip input/output terminals, an arrangement for providing electrical communication between said input/output terminals and components external to said package, and an electrical inductor arrangement. The electrical inductor arrangement includes an origination terminal, a termination terminal, at least one intermediate connecting surface and a bonding wire positioned within the package. A first segment of the bonding wire is electrically connected with the origination terminal and a second segment is electrically connected with the termination terminal. Furthermore, the bonding wire has at least one intermediate point along it's length physically connected with one intermediate connecting surface. In one embodiment, the bonding wire is continuous along its length.
    Type: Grant
    Filed: November 7, 1997
    Date of Patent: March 23, 1999
    Assignee: National Semiconductor Corporation
    Inventors: Richard Billings Merrill, Inderjit Singh
  • Patent number: 5880460
    Abstract: The noise in the photo information output from a CMOS-based active pixel sensor cell is reduced by setting the voltage on the output of the cell to a predetermined voltage, such as ground or the power supply voltage, each time the cell is read prior to the cell being read.
    Type: Grant
    Filed: June 9, 1997
    Date of Patent: March 9, 1999
    Assignee: Foveonics, Inc.
    Inventor: Richard Billings Merrill
  • Patent number: 5854498
    Abstract: The accuracy of an active pixel sensor cell is increased by utilizing a reset diode in lieu of the reset transistor that is conventionally used to reset the voltage on the photodiode of the cell. The reset diode, which is largely unaffected by 1/f noise, consistently resets the photodiode to a substantially constant voltage as opposed to the reset transistor which varies the reset voltage on the photodiode across integration periods due to the effect of 1/f noise. In the present invention, the photodiode is formed by forming a well region of a second conductivity type in a substrate of a first conductivity type. The reset diode is then formed by forming a reset region of the first conductivity type in the well region.
    Type: Grant
    Filed: February 23, 1998
    Date of Patent: December 29, 1998
    Assignee: Foveonics, Inc.
    Inventor: Richard Billings Merrill
  • Patent number: 5844299
    Abstract: An integrated inductor with filled etch includes a substrate of semiconductor material which includes a surface and a cavity disposed therein, a mass of dielectric material disposed within the cavity, a layer of dielectric material disposed upon the mass of dielectric material, and a patterned layer of conductive material disposed upon the layer of dielectric material, such that the integrated inductor is formed without an oxide bridge. Thus, the integrated inductor has a rugged architecture.
    Type: Grant
    Filed: January 31, 1997
    Date of Patent: December 1, 1998
    Assignee: National Semiconductor Corporation
    Inventors: Richard Billings Merrill, Donald M. Archer