Abstract: A photographic lithography method for printing chip sections of a mask to a wafer is provided. The method includes generating the mask including a pattern of rows of the chip sections, each alternating row including half-fields mirrored with respect to corresponding half-fields of an adjacent row, exposing every other row of half-fields with the pattern and the wafer in a first relative orientation based on mirroring of the half-fields and the corresponding half-fields, re-orienting the pattern and the wafer to have a second relative orientation opposite the first relative orientation and exposing remaining rows of the half-fields with the pattern and the wafer in the second relative orientation.

Abstract: The present invention provides MDM2 inhibitor compounds of Formula I, wherein the variables are defined above, which compounds are useful as therapeutic agents, particularly for the treatment of cancers. The present invention also relates to pharmaceutical compositions that contain an MDM2 inhibitor.

Abstract: According to the embodiment of the present invention, a semiconductor device includes a first nanodevice and a second nanodevice. The second nanodevice is adjacent to and parallel to the first nanodevice along an x-axis. A dielectric fill is located between the first nanodevice and the second nanodevice. A dielectric liner is comprised of a first dielectric liner and a second dielectric liner. The first dielectric liner is located between the first nanodevice and the dielectric fill. The second dielectric liner is located between the second nanodevice and the dielectric fill. A plurality of self-aligned contact (SAC) caps is comprised of a head section and a shaft section. The head section extends a first width parallel to the x-axis and is in direct contact with a frontside of the dielectric liner. The shaft section extends a second width parallel to the x-axis. The first width is greater than the second width.

Abstract: Embodiments are disclosed for a method. The method includes generating a correction datastore indicating shifts in magnitude representing corresponding characters that uniquely identify hardware comprising a computer processing chip. The method further includes generating security masks based on a correction file. Additionally, the method includes using a correction process for the computer processing chip. The generated security masks include corresponding overlays representing the shifts in magnitude with respect to corresponding product masks for the computer processing chip. The method also includes generating the computer processing chip using the security masks and the product masks.

Abstract: Described is a semiconductor processing system including a measurement tool configured to measure warpage characteristics in a semiconductor wafer. The semiconductor processing system further includes a pixelated surface configured to retain the semiconductor wafer, where the pixelated surface approximates the warpage characteristics to conform to the semiconductor wafer. The semiconductor processing system further includes a semiconductor processing tool configured to perform processing on the semiconductor wafer while it is retained on the pixelated surface.

Abstract: Embodiments are disclosed for a method. The method includes generating a correction datastore indicating shifts in magnitude representing corresponding characters that uniquely identify hardware comprising a computer processing chip. The method further includes generating security masks based on a correction file. Additionally, the method includes using a correction process for the computer processing chip. The generated security masks include corresponding overlays representing the shifts in magnitude with respect to corresponding product masks for the computer processing chip. The method also includes generating the computer processing chip using the security masks and the product masks.

Abstract: Embodiments of the invention include methods and structures for controlling developer critical dimension (DCD) variations across a wafer surface. Aspects of the invention include an apparatus having developer tubing and an internal cam. The internal cam is coupled to a fixed axis. A flexible divider is positioned between the developer tubing and the internal cam. The flexible divider is coupled to the internal cam such that rotation of the internal cam about the fixed axis is operable to change an inner diameter of the developer tubing.

Abstract: In an approach, a processor receives device identification information corresponding to at least one device local to a location of a transaction. A processor receives notification of an infected user. A processor determines that the infected user is associated with the transaction. A processor identifies a second user from the device identification information. A processor sends a notification to the second user.

Abstract: Techniques for secure and tamper-resistant wafer identification using a unique wafer fingerprint are provided. In one aspect, a method for wafer authentication includes: placing, at each level of fabrication of chips on the wafer, reference structures across the chips; inspecting the wafer at each level of the fabrication; and performing at least one of overlay and scatterometry measurements of the reference structures to use as a unique fingerprint for authenticating the wafer that has been inspected. A method for authentication throughout a process flow for fabrication of chips on a wafer is also provided, as is a wafer having chips and reference structures placed across the chips at each level of the chips to provide a unique fingerprint for authenticating the wafer.

Abstract: Devices and methods for granting requests for authorization using data of devices associated with requestors are disclosed. A method includes: receiving, by a computing device, a request for authorization; receiving, by the computing device, identification information for at least one device of a requestor; determining, by the computing device, a risk score using the received identification information for the at least one device of the requestor; and in response to the risk score exceeding a predetermined threshold, the computing device granting the request for authorization.

Abstract: Embodiments of the invention include methods and structures for controlling developer critical dimension (DCD) variations across a wafer surface. Aspects of the invention include an apparatus having developer tubing and an internal cam. The internal cam is coupled to a fixed axis. A flexible divider is positioned between the developer tubing and the internal cam. The flexible divider is coupled to the internal cam such that rotation of the internal cam about the fixed axis is operable to change an inner diameter of the developer tubing.

Abstract: Transaction verification mechanisms are provided that receive transaction information, from a computing device at a transaction location, including user device information specifying one or more user device identifiers associated with a user initiating a transaction, vendor device information specifying a plurality of vendor device identifiers in a near field area associated with the computing device, and account information for an account being used to perform the transaction. A user device verification is performed on the one or more user device identifiers and a vendor device verification of the plurality of vendor device identifiers is performed to verify the transaction location as being an authorized vendor location. A determination whether to approve/deny completion of the transaction at the computing device is performed based on results of the user device verification and the vendor device verification and an output is sent to the computing device based on the determination.

Abstract: Communication source identifier verification system mechanisms are provided. The mechanisms receive communication information for a communication initiated between a source communication system and a destination communication system. The communication information comprises a source identifier and a local device identifier signature specifying zero or more local device identifiers of devices local to the source communication system. The mechanisms retrieve valid device identifier information for an authorized communication source corresponding to the identifier of the source communication system. The mechanisms execute a verification operation that verifies whether the source identifier is validly associated with the source communication system based on the retrieved valid device identifier information and the local device identifier signature.

Abstract: Systems, methods and computer program products generally include a vector by vector subtraction method per wafer. A first layer is exposed to form a pattern image on a wafer and the overlay data of alignment registration marks at multiple locations relative to alignment registration marks of a baseline reference are measured. The first layer is then reworked and exposed to form the same pattern image and the overlay data of alignment registration marks at multiple locations relative to alignment registration marks of a first layer are measured. The overlay data of the reworked first layer is subtracted from the overlay data of the first layer to provide an overlay difference at each of the multiple locations. The overlay difference is converted to a pre-correction factor of a magnitude opposite that of the overlay difference and is applied to exposure of a second layer provided on the first layer.

Abstract: Systems, methods and computer program products generally include a vector by vector subtraction method per wafer. A first layer is exposed to form a pattern image on a wafer and the overlay data of alignment registration marks at multiple locations relative to alignment registration marks of a baseline reference are measured. The first layer is then reworked and exposed to form the same pattern image and the overlay data of alignment registration marks at multiple locations relative to alignment registration marks of a first layer are measured. The overlay data of the reworked first layer is subtracted from the overlay data of the first layer to provide an overlay difference at each of the multiple locations. The overlay difference is converted to a pre-correction factor of a magnitude opposite that of the overlay difference and is applied to exposure of a second layer provided on the first layer.

Abstract: Embodiments of the invention include methods and structures for controlling developer critical dimension (DCD) variations across a wafer surface. Aspects of the invention include an apparatus having developer tubing and an internal cam. The internal cam is coupled to a fixed axis. A flexible divider is positioned between the developer tubing and the internal cam. The flexible divider is coupled to the internal cam such that rotation of the internal cam about the fixed axis is operable to change an inner diameter of the developer tubing.

Abstract: Devices and methods for granting requests for authorization using data of devices associated with requestors are disclosed. A method includes: receiving, by a computing device, a request for authorization; receiving, by the computing device, identification information for at least one device of a requestor; determining, by the computing device, a risk score using the received identification information for the at least one device of the requestor; and in response to the risk score exceeding a predetermined threshold, the computing device granting the request for authorization.

Abstract: Embodiments of the invention include methods and structures for controlling developer critical dimension (DCD) variations across a wafer surface. Aspects of the invention include an apparatus having developer tubing and an internal cam. The internal cam is coupled to a fixed axis. A flexible divider is positioned between the developer tubing and the internal cam. The flexible divider is coupled to the internal cam such that rotation of the internal cam about the fixed axis is operable to change an inner diameter of the developer tubing.

Abstract: A processor may initiate a first verification event. The processor may identify two or more devices that are within a predetermined area of the processor during the initiating of the first verification event. The processor may verify an identity of a verified user based on the two or more devices. The processor may process the first verification event in response to verifying the identity of the verified user.

Abstract: A processor may initiate a first verification event. The processor may identify two or more devices that are within a predetermined area of the processor during the initiating of the first verification event. The processor may verify an identity of a verified user based on the two or more devices. The processor may process the first verification event in response to verifying the identity of the verified user.