Abstract: A method of calibrating a regulator includes: measuring at least one of a voltage and a current; comparing the measurement to a nominal value of the at least one of the voltage and the current; generating a correction parameter of the comparison of the measurement to the nominal value; and storing the correction parameter in a local memory of the regulator.

Abstract: Methods and apparatus for a power regulator according to various aspects of the present invention may comprise a sensor adapted to generate a measurement of a voltage or a current. A memory may store a correction parameter that corresponds to the measurement, and a correction system may be adapted to adjust the measurement according to the correction parameter.

Abstract: Methods and apparatus for a power regulator according to various aspects of the present invention may comprise a sensor adapted to generate a measurement of a voltage or a current. A memory may store a correction parameter that corresponds to the measurement, and a correction system may be adapted to adjust the measurement according to the correction parameter.

Abstract: Methods and apparatus for a power regulator according to various aspects of the present invention may comprise a sensor adapted to generate a measurement of a voltage or a current. A memory may store a correction parameter that corresponds to the measurement, and a correction system may be adapted to adjust the measurement according to the correction parameter.

Abstract: A multiphase power regulator includes a multiphase pulse width modulator, an output stage and an active transient response circuit. The output stage includes a high side transistor, a low side transistor and an inductor. The output stage is configured to supply power to a load responsive to signals generated by the multiphase pulse width modulator. The active transient response circuit is coupled between the output stage and the multiphase pulse width modulator and configured to detect the voltage level at the output stage and provide a signal to the multiphase pulse width modulator that is a function of the amplitude of the deviation of the detected voltage level from a target voltage.

Abstract: A multiphase power regulator includes a multiphase pulse width modulator, an output stage and an active transient response circuit. The output stage includes a high side transistor, a low side transistor and an inductor. The output stage is configured to supply power to a load responsive to signals generated by the multiphase pulse width modulator. The active transient response circuit is coupled between the output stage and the multiphase pulse width modulator and configured to detect the voltage level at the output stage and provide a signal to the multiphase pulse width modulator that is a function of the amplitude of the deviation of the detected voltage level from a target voltage.

Abstract: Disclosed is a power regulator for providing precisely regulated power to a microelectronic device such as a microprocessor. Improved power regulation is accomplished by optimizing the power efficiency of the power regulator. In particular, in a multiphase system, the number of active phases is increased or decreased to achieve optimum power efficiency. The multiphase voltage regulator adapts the operating mode to maximize efficiency as the load current demand of the load device changes by adjusting the number of active phases to maximize efficiency. The total value of current provided by the regulator and the total number of active phases is determined, the total number of active phases is compared with the number of active phases required to provide the total value of current at maximum efficiency; and the number of active phases is adjusted to provide the total value of current at maximum efficiency.

Abstract: Disclosed is a multi-phase pulse width modulated voltage regulator and method in which transient voltage excursions or deviations that exceed the load line voltage by more than a predetermined amount are detected by an ATR circuit and a correction signal is applied. The correction signal is in the form of asynchronous pulses and the number of such pulses is a function of the magnitude of the voltage excursion as determined by the number of thresholds that are exceeded. Also disclosed is an adaptive voltage positioning (AVP) circuit and method for early detection of a transient event by sensing voltage changes at the load and adjusting the target voltage with pre-determined current values prior to the time that ATR event changes in the current at the load are detected. The AVP load line is pre-positioned for more precise current control. Also disclosed is an adaptive filter with adjustable frequency characteristics in response to an ATR event. Also disclosed is a pulse limiting circuit.

Abstract: Disclosed is a power regulator for providing precisely regulated power to a microelectronic device such as a microprocessor. Improved power regulation is accomplished by optimizing the power efficiency of the power regulator. In particular, in a multiphase system, the number of active phases is increased or decreased to achieve optimum power efficiency. The multiphase voltage regulator adapts the operating mode to maximize efficiency as the load current demand of the load device changes by adjusting the number of active phases to maximize efficiency. The total value of current provided by the regulator and the total number of active phases is determined, the total number of active phases is compared with the number of active phases required to provide the total value of current at maximum efficiency; and the number of active phases is adjusted to provide the total value of current at maximum efficiency.

Abstract: Disclosed is a multi-phase pulse width modulated voltage regulator and method in which transient voltage excursions or deviations that exceed the load line voltage by more than a predetermined amount are detected by an ATR circuit and a correction signal is applied. The correction signal is in the form of asynchronous pulses and the number of such pulses is a function of the magnitude of the voltage excursion as determined by the number of thresholds that are exceeded. Also disclosed is an adaptive voltage positioning (AVP) circuit and method for early detection of a transient event by sensing voltage changes at the load and adjusting the target voltage with pre-determined current values prior to the time that ATR event changes in the current at the load are detected. The AVP load line is pre-positioned for more precise current control. Also disclosed is an adaptive filter with adjustable frequency characteristics in response to an ATR event. Also disclosed is a pulse limiting circuit.

Abstract: Disclosed is a multi-phase pulse width modulated voltage regulator and method in which transient voltage excursions or deviations that exceed the load line voltage by more than a pre-determined amount are detected by an ATR circuit and a correction signal is applied. The correction signal is in the form of asynchronous pulses and the number of such pulses is a function of the magnitude of the voltage excursion as determined by the number of thresholds that are exceeded. Also disclosed is an adaptive voltage positioning (AVP) circuit and method for early detection of a transient event by sensing voltage changes at the load and adjusting the target voltage with pre-determined current values prior to the time that ATR event changes in the current at the load are detected. The AVP load line is pre-positioned for more precise current control. Also disclosed is an adaptive filter with adjustable frequency characteristics in response to an ATR event. Also disclosed is a pulse limiting circuit.

Abstract: Disclosed is a power regulator for providing precisely regulated power to a microelectronic device such as a microprocessor. Improved power regulation is accomplished by optimizing the power efficiency of the power regulator. In particular, in a multiphase system, the number of active phases is increased or decreased to achieve optimum power efficiency. The multiphase voltage regulator adapts the operating mode to maximize efficiency as the load current demand of the load device changes by adjusting the number of active phases to maximize efficiency. The total value of current provided by the regulator and the total number of active phases is determined, the total number of active phases is compared with the number of active phases required to provide the total value of current at maximum efficiency; and the number of active phases is adjusted to provide the total value of current at maximum efficiency.

Abstract: A method and circuit for pre-emphasis equalization of a high speed data communication system can be provided through the use of programmable pulse shaping. A data communication system configured with the pre-emphasis equalization circuit operates by receiving an input data stream and outputting a data stream for transmission through an interconnect or other transmission channel. The data can be passed through an output buffer configured with programmable pre-emphasis equalization, having input inverters at an input stage and output inverters at an output stage. During operation, once an input signal to the input stage transitions, for example from a low to a high state, an input signal to the output stage is configured to a full amplitude to drive the transmission channel. Once the output stage transitions to a full amplitude, the input of the output stage is configured closer to a mid-scale amplitude.

Abstract: A method and circuit for pre-emphasis equalization of a high speed data communication system can be provided through the use of programmable pulse shaping. A data communication system configured with the pre-emphasis equalization circuit operates by receiving an input data stream and outputting a data stream for transmission through an interconnect or other transmission channel. The data can be passed through an output buffer configured with programmable pre-emphasis equalization, having input inverters at an input stage and output inverters at an output stage. During operation, once an input signal to the input stage transitions, for example from a low to a high state, an input signal to the output stage is configured to a full amplitude to drive the transmission channel. Once the output stage transitions to a full amplitude, the input of the output stage is configured closer to a mid-scale amplitude.

Abstract: A method and circuit for pre-emphasis equalization of a high speed data communication system can be provided through the use of programmable pulse shaping. A data communication system configured with the pre-emphasis equalization circuit operates by receiving an input data stream and outputting a data stream for transmission through an interconnect or other transmission channel. The data can be passed through an output buffer configured with programmable pre-emphasis equalization, having input inverters at an input stage and output inverters at an output stage. During operation, once an input signal to the input stage transitions, for example from a low to a high state, an input signal to the output stage is configured to a full amplitude to drive the transmission channel. Once the output stage transitions to a full amplitude, the input of the output stage is configured closer to a mid-scale amplitude.

Abstract: An apparatus for filtering an input signal includes a first second order filter section having an output and an intermediate output, a second second order filter section having an input connected to the output of the first second order filter, and a gain stage coupling the output of the first second order filter section and the intermediate output of the first second order filter section to the output of the second second order filter section. The gain stage is coupled such that a transfer function between the output of the second second order filter section and the input of the second second order filter section is a biquadratic transfer function.

Abstract: A method and circuit for pre-emphasis equalization of a high speed data communication system can be provided through the use of programmable pulse shaping. A data communication system configured with the pre-emphasis equalization circuit operates by receiving an input data stream and outputting a data stream for transmission through an interconnect or other transmission channel. The data can be passed through an output buffer configured with programmable pre-emphasis equalization, having input inverters at an input stage and output inverters at an output stage. During operation, once an input signal to the input stage transitions, for example from a low to a high state, an input signal to the output stage is configured to a full amplitude to drive the transmission channel. Once the output stage transitions to a full amplitude, the input of the output stage is configured closer to a mid-scale amplitude.

Abstract: A capacitor current sensing circuitry (100) for sensing the current through a bandpass capacitor (20) of a first biquad stage (80) and generating an output current in response. The capacitor current sensing circuitry (100) includes a differential input circuit comprising a transistor (123) and a transistor (124), a fixed current source (130), a variable current source (120), a variable current, source (122), an input current sink (126), a differential output circuit comprising a transistor (132) and a transistor (134), and a programmable output current sink (138). The differential input circuit receives an input sense voltage and generates a first input current, a second input current, a first output voltage, and a second output voltage in response. The fixed current source (130) generates a current that is used to provide a first current component to the first input current and a first current component to the second input current.

Abstract: A transconductor is provided having a transconductance G.sub.m. This transconductance is then attenuated with a steering circuit (41) to attenuate the overall transconductance of the transconductor and vary the bandwidth. A fixed voltage is then input to the transconductor with the output thereof offset with a programmable current DAC (48). This output is then provided to an error amplifier (46) for developing an error voltage. This error voltage is then input back to the input of the transconductor to adjust the transconductance thereof to minimize this error. The steering circuit (41) is controlled by a voltage DAC (58) to program the attenuation provided thereby. Both the voltage DAC (58) and the current DAC (48) are controlled by a bandwidth control signal to program the bandwidth of the overall transconductor. This is facilitated while compensating for the process and temperature variations of the transconductance of the transconductor. This is also facilitated with a master/slave relationship.

Abstract: A method and circuit for routing data to registers in an integrated circuit is disclosed. The circuit comprises an I/O port (100) for receiving data and address signals, and a plurality of distributed memory modules (200-900) having registers (210-217). Each memory module is associated with and located adjacent to a circuit functional block. All of the memory modules (200-900) are connected to the I/O port (100) via a single data bus (40).