Abstract: An embodiment of the memory cell for an EEPROM device may comprise a trench coupling capacitor wherein the coupling oxide of the coupling capacitor is formed only in the trench (i.e., such that coupling occurs only in the trench). In addition, a first portion of a floating gate of the memory cell is formed in the trench to function as a part of the coupling capacitor as well as a floating gate. A floating gate second portion is electrically connected to the first portion. A control gate is connected to a doped region of the substrate and a thin tunnel dielectric physically separates the floating gate second portion from the coupling oxide layer and from the doped region of the substrate.

Abstract: A method for manufacturing an integrated circuit improves the reliability of thermosonic bonds formed to attach a gold bond wire to an aluminum interconnect pad by reducing corrosion of the aluminum pad regions. In the method, a gold or silver plating is applied to the aluminum bond pads to prevent corrosion of the aluminum pad surface. Prior to applying the plating, corrosive contaminants are removed from the aluminum pad regions using an argon sputter etch. Annealing is used to remove damage from the argon sputtering, and further serves to alloy the resultant aluminum to gold or aluminum to silver interface. The aluminum pad layer is made very thin, or less than approximately 8000 Å to limit Kirkendall voiding when gold wires are bonded to the pad using a thermosonic bonding process.

Abstract: A method for manufacturing an integrated circuit improves the reliability of thermosonic bonds formed to attach a gold bond wire to an aluminum interconnect pad by reducing corrosion of the aluminum pad regions. In the method, a gold or silver plating is applied to the aluminum bond pads to prevent corrosion of the aluminum pad surface. Prior to applying the plating, corrosive contaminants are removed from the aluminum pad regions using an argon sputter etch. Annealing is used to remove damage from the argon sputtering, and further serves to alloy the resultant aluminum to gold or aluminum to silver interface. The aluminum pad layer is made very thin, or less than approximately 8000 Å to limit Kirkendall voiding when gold wires are bonded to the pad using a thermosonic bonding process.

Abstract: In method for manufacturing an integrated circuit improves the reliability of thermosonic bonds formed to attach a gold bond wire to an aluminum interconnect pad, where a pad opening in the integrated circuit is on the order of 60 microns. In the method, a reactive ion etch (RIE) passivation etch is used which does not include a, more corrosive sulfur hexa-fluoride to remove the SiO2 passivation layer above the pad. Instead, the RIE uses argon as the carrier gas, carbon tetrafluoride (CF4) and trifluoromethane (CHF3) as active etchants, and oxygen (O2) to reduce the residual halide contaminant in the aluminum pad. Further, a thin titanium layer is deposited beneath the aluminum pad layer to improve adhesion of the aluminum pad to underlying layers of the semiconductor integrated circuit. The aluminum pad layer is made very thin, or less than approximately 8000 Å, to limit Kirkendall voiding.

Abstract: A semiconductor device with a base region that terminates on the surface of a slot that surrounds the base region. The base region terminates substantially perpendicular to the surface of the slot. The collector-base junction has substantially no cylindrical or spherical curvature.