Abstract: A configuration of logic elements enables existing Serial-In-Parallel-Out (SIPO) shift registers to perform their own bit count, report the receipt of a valid transmission consisting of an expected number of bits and report the receipt of an invalid transmission consisting of greater than the expected number of bits. Logic elements additional to the foregoing enable SIPO shift registers to receive valid transmissions of varying expected numbers of bits. Special purpose integrated circuits (ICs) are disclosed which also contain the aforementioned configurations of logic elements. Newly designed SIPO shift registers which contain within them the foregoing configurations of logic elements are further disclosed. Potential messages of multiple acceptable message lengths are accommodated. Some embodiments are equipped with tri-state data outputs.

Abstract: A configuration of logic elements enables existing Serial-In-Parallel-Out (SIPO) shift registers to perform their own bit count, report the receipt of a valid transmission consisting of an expected number of bits and report the receipt of an invalid transmission consisting of greater than the expected number of bits. Logic elements additional to the foregoing enable SIPO shift registers to receive valid transmissions of varying expected numbers of bits. Special purpose integrated circuits (ICs) are disclosed which also contain the aforementioned configurations of logic elements. Newly designed SIPO shift registers which contain within them the foregoing configurations of logic elements are further disclosed. Potential messages of multiple acceptable message lengths are accommodated. Some embodiments are equipped with tri-state data outputs.

Abstract: An N stage Gray code generator includes an N stage binary counter having an input for receiving clock pulses to be counted and providing N outputs forming an N bit binary code. N minus 1 storage stages capable of being toggled between a logic "1" and a logic "0" state, each having a toggle input to cause them to toggle, have their toggle inputs coupled to the outputs of the first N minus 1 stages of the binary counter. The outputs of the N minus 1 storage stages form the first N minus 1 Gray code outputs and the most significant output of the binary counter provides the most significant output of the Gray code generator.

Abstract: A combination non-inverting driver and a resistor ensures the locking of a free floating bus line of a CMOS system into whatever logic state the bus line was last driven.

Abstract: An antenna system for an article of furniture in which a panel of the article of furniture is sealed by a low loss dielectric material to isolate the panel from impurities which affect its electrical integrity. An antenna structure is applied thereon by silk screening, painting or otherwise marking of a conductive ink, or by vacuum deposition techniques, or by application of stamped or die cut foil, or by metallic tape, all by way of example. Connections to the antenna structure are made by compressing a conductive elastomeric material against terminations of the antenna structure so as to avoid temperature or other initiated dimensional changes of the panel which could effect the contact resistance to the terminations of the antenna structure, and also to avoid damaging the antenna structure. A specific connection arrangement is disclosed.

Abstract: The output of an electrical generator driven by a meter is coupled to a load through circuitry for limiting the reflected forces placed on the meter.

Abstract: This disclosure relates to methods and apparatus for providing in a tool, appliance, or other electrically operated device the safety feature of requiring that the trigger or ON-OFF switch be in or returned to the OFF position before the tool will respond to placing the trigger or ON-OFF switch in the ON position.

Abstract: The complexity of a memory driver system is decreased by minimizing the number of half-select current driver circuits and corresponding terminals and wires connected between the driver lines and the core stack. This is effected by maximizing the number of current paths between memory drivers.

Abstract: An optical encoding arrangement for determining the position of a movable member is provided with an optically masked light transmitting coding element interposed between a light emitting array and a light detecting array so that the light detecting elements in the array are selectively energized in accordance with the position being measured. In particular, the encoder provides for transmission, by optical means, of a series of digital bytes of predetermined length, in a bit parallel byte serial format, with the successive bytes later being assembled into a usable data format.

Abstract: A display system utilizing an array of display cells each of which includes a pair of oppositely polarized display elements connected in parallel. One or the other of the display elements in a selected display cell is energized by controlling the direction of current flow through the display cell.

Abstract: A device for converting ternary-coded electrical pulse trains into binary-coded pulse trains, by interrupting a binary zero-rate data stream, representing one ternary condition, to supply an output voltage or no output voltage, representing the other ternary conditions.

Abstract: A circuit for converting serial binary coded ternary information received on one line into ternary signals for transmission on two lines. The presence or absence of a pulse in a first interval is compared with the presence or absence of a pulse in the succeeding interval and a voltage representing one ternary condition is transmitted on one line if pulses are present, on another line, if pulses are absent, and no signal is transmitted if alternating pulses are received.