Abstract: A data processing system includes a system management unit, a number of central subsystems, a main memory and a number of peripheral subsystems all coupled in common to a system bus. Any subsystem may generate a command which includes a first field specifying a destination subsystem, a second field specifying the operation the destination subsystem is to perform. If a response is required, the subsystem generating the initial command may specify a third subsystem for receiving the response command.

Abstract: A data processing unit includes a number of tightly coupled central subsystems, a number of peripheral subsystems, a main memory and a system management facility all coupled in common to a system bus. The system management unit has top priority on the system bus and includes centralized resources which provide apparatus for indicating the status of power and temperature, booting the subsystems, testing the subsystems, timing central subsystem functions, and allowing local and remote maintenance access to the subsystems. The system management facility receives commands from the central subystem to read from and write into the timers as well as to read the status of the overall system. The system management facility generates special commands to the central subsystem to indicate when the timers have decremented to ZERO as well as special commands to aid in hardware and software debugging.

Abstract: A means for ascertaining the health, or basic operational status, of a system unit. A "health check" provides an indication of either "yes", the system unit is operational, or "no", the system unit is either inoperative or there is a question as to whether the system is operational. The test is performed by requesting that the system unit perform a high priority "short" operation and noting the response provided to the request; the actual execution of the request is unimportant and it is the response of the unit under test to the receipt of the request for a bus operation that is the actual indicator of the status of the unit being tested. The requested operation is not directed at the unit whose operational status is to be determined, but instead at a bus interface unit which performs bus operations for the unit to be tested and whose responses to requests for bus operations are effected by the operational status of the unit that is to be tested.

Abstract: A data processing system includes at least one modem connected from a communications link to the remote devices and at least one modem controller. A modem adaptor stores scripts for directing modem control related operation, each script being a sequence of links and each link directing a modem control related operation, a library of modem control subroutines, each subroutine corresponding to a link, and a link table relating each link to the corresponding subroutine. There is a set of scripts for each type of modem connected to the system.

Abstract: A method for performing initial testing of a system wherein, in response to power on of the system, the control store of a central subsystem is loaded with a testing microinstruction program for internal testing of the central subsystem and the testing program executed. Upon completion of the testing program, the central subsystem operating programs are loaded into the control store, and control of the data processing system is transferred to the system programs.

Abstract: A multiprocessor data processing system includes a system management facility which controls the loading of each control store in the respective multiprocessor. The system management facility generates a sequence of commands which puts a processor in load mode, initializes a control store address register, transfers firmware words from a main memory to the control store, resets the load mode, starts a verify operation and checks the result of the verify operation.

Abstract: A central subsystem of a data processing system includes a writable control store which is loaded with firmware to control the central subsystem operations. The central subsystem logic is responsive to a sequence of commands from a system management facility to load the control store and verify that the control store firmware is loaded correctly.

Abstract: A single computer board data processing system includes a multiport memory system which is accessible by I/O controllers through a system bus I/O memory port or directly by the system's central processing unit (CPU) via a CPU memory port. The logic and control circuits of the memory ports and CPU are included within the computer main board while memory modules/pacs are contained on one or more memory daughter boards which plug into memory input/output connectors contained on the main board. The port address and data paths connect in common to the memory connectors for transmitting and receiving memory addresses and data between the memory modules and the CPU and I/O ports. At least one register connects between the CPU and to common address path.