Patents by Inventor Richard Charles Paddock

Richard Charles Paddock has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 3991408
    Abstract: A self-sequenced read only memory is shown wherein each word line contains dynamic logic circuits for energizing a next word line after the fixed time delay provided by the dynamic logic circuits. Self-sequencing inverters are physically placed within the array area thereby increasing reliability and reducing circuit wiring. When used as a microprogram control storage, the memory is divided into a plurality of self-sequenced control routines. When a certain function is to be performed, the first word line of the control routine for performing the selected function is energized. Since each word line includes a one cycle delay and is wired to the next sequential word line, no separate timing or address control is required to address word lines within a selected control routine. Once a control routine is energized, sequential microinstructions will be automatically fetched including branch and branch-on condition instructions.
    Type: Grant
    Filed: November 27, 1974
    Date of Patent: November 9, 1976
    Assignee: International Business Machines Corporation
    Inventors: Arthur Wilbert Holmes, Jr., Gerald Bernard Long, Richard Charles Paddock, Shing Chou Pi, Donald Walter Price
  • Patent number: 3943494
    Abstract: A processor including a plurality of synchronized subprocessors, each implemented on an integrated circuit substrate and each having an instruction register and instruction executing circuits for independently executing a portion of the functions required by an instruction being simultaneously executed by each subprocessor. Execution is initiated and synchronized by simultaneously loading the same instruction into each subprocessor.
    Type: Grant
    Filed: June 26, 1974
    Date of Patent: March 9, 1976
    Assignee: International Business Machines Corporation
    Inventors: Arthur Wilbert Holmes, Jr., Price Ward Oman, Richard Charles Paddock, Donald Walter Price
  • Patent number: 3940596
    Abstract: Dynamic logic counting circuits are disclosed using recirculating latched memory stages having parallel shift circuits operating in synchronism with the latch circuits to control stepping of the counts. An alternate embodiment employs steering circuit controlled subcounters, each subcounter having a parallel shift circuit operating in synchronism with its respective subcounter to step the next succeeding subcounter when its respective subcounter reaches a predetermined count such as 9 for a binary coded decimal counter or 15 for a binary counter.
    Type: Grant
    Filed: April 24, 1975
    Date of Patent: February 24, 1976
    Assignee: International Business Machines Corporation
    Inventor: Richard Charles Paddock