Patents by Inventor Richard D. Neufeld
Richard D. Neufeld has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240019514Abstract: Thermally isolating cable assemblies, systems using the assemblies, and methods for fabricating the assemblies are discussed. A cable assembly includes a first shielding cable comprising a first solderable material interleaved with a section of a second shielding cable comprising an exterior material that is a second solderable material and an inner material that is superconductive at and below a critical temperature. The cable assembly may be fabricated during the assembly of an apparatus, and, following assembly of the apparatus, a segment of the second shielding cable is etched to expose a portion of the inner material. Following fabrication of the cable assemblies, the apparatus may be installed in a cryogenic environment in which the inner material may be operable as a superconductor and may thermally isolate the cabling assembly distal to the exposed portion to reduce heat load to a superconducting circuit.Type: ApplicationFiled: February 1, 2023Publication date: January 18, 2024Inventors: Richard D. Neufeld, Surjit Singh Dhesi, Oscar Yui-kit Fung
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Patent number: 11678433Abstract: Systems, methods, and devices for electrically coupling an integrated circuit to a set of coaxial lines via a printed circuit board assembly are described. A device sample holder includes a printed circuit board that is operable to edge-couple to an integrated circuit. A surface of the printed circuit board that carries a set of coaxial connectors is orthogonal to another surface of the printed circuit board that exposes a set of conductive traces. The set of conductive traces are operable to electrically couple to a set of conductive paths of an integrated circuit to provide a communicative path between the integrated circuit and components of an input/output system in a refrigerated environment.Type: GrantFiled: September 4, 2019Date of Patent: June 13, 2023Assignee: D-WAVE SYSTEMS INC.Inventor: Richard D. Neufeld
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Patent number: 11647590Abstract: A method of fabricating a multilayer superconducting printed circuit board comprises first, forming a bimetal foil to overlie a substrate, the bimetal foil comprising a first layer of a first metal, a layer of a second metal, and a second layer of the first metal, and then etching the second layer of the first metal. Forming a bimetal foil to overlie a substrate may include forming a bimetal foil comprising a first layer of a normal metal, a layer of a superconducting metal, and a second layer of the normal metal. Etching the second layer of the first metal may include preparing a patterned image in the second layer of the first metal for etching, processing the patterned image through a cleaner, rinsing the patterned image, and then, immersing the patterned image in a microetch.Type: GrantFiled: June 9, 2020Date of Patent: May 9, 2023Assignee: D-WAVE SYSTEMS INC.Inventors: Jeffrey P. Burress, Richard D. Neufeld, Surjit Singh Dhesi
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Patent number: 11617272Abstract: A multilayer circuit board structure includes superconducting connections to internal layers thereof, for example by inclusion of superconducting vias. Two or more panels can each comprise respective electrically insulative substrates, each have one or more through-holes, and also include a respective bimetal foil on at least a portion of a respective surface thereof, which is patterned to form traces. The bimetal foil includes a first metal that is non-superconductive in a first temperature range and a second metal that is superconductive in the first temperature range. The panels are plated to deposit a third metal on exposed traces of the second metal, the third metal superconductive in the first temperature range. Panels are join (e.g., laminated) to form at least a three-layer superconducting printed circuit board with an inner layer, two outer layers, and superconducting vias between the inner layer and at least one of the two outer layers.Type: GrantFiled: December 7, 2017Date of Patent: March 28, 2023Assignee: D-WAVE SYSTEMS INC.Inventor: Richard D. Neufeld
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Publication number: 20200404792Abstract: A method of fabricating a multilayer superconducting printed circuit board comprises first, forming a bimetal foil to overlie a substrate, the bimetal foil comprising a first layer of a first metal, a layer of a second metal, and a second layer of the first metal, and then etching the second layer of the first metal. Forming a bimetal foil to overlie a substrate may include forming a bimetal foil comprising a first layer of a normal metal, a layer of a superconducting metal, and a second layer of the normal metal. Etching the second layer of the first metal may include preparing a patterned image in the second layer of the first metal for etching, processing the patterned image through a cleaner, rinsing the patterned image, and then, immersing the patterned image in a microetch.Type: ApplicationFiled: June 9, 2020Publication date: December 24, 2020Inventors: Jeffrey P. Burress, Richard D. Neufeld, Surjit Singh Dhesi
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Patent number: 10755190Abstract: An electrical filter includes a dielectric substrate with inner and outer coils about a first region and inner and outer coils about a second region, a portion of cladding removed from wires that form the coils and coupled to electrically conductive traces on the dielectric substrate via a solder joint in a switching region. An apparatus to thermally couple a superconductive device to a metal carrier with a through-hole includes a first clamp and a vacuum pump. A composite magnetic shield for use at superconductive temperatures includes an inner layer with magnetic permeability of at least 50,000; and an outer layer with magnetic saturation field greater than 1.2 T, separated from the inner layer by an intermediate layer of dielectric. An apparatus to dissipate heat from a superconducting processor includes a metal carrier with a recess, a post that extends upwards from a base of the recess and a layer of adhesive on top of the post. Various cryogenic refrigeration systems are described.Type: GrantFiled: December 16, 2016Date of Patent: August 25, 2020Assignee: D-WAVE SYSTEMS INC.Inventors: Alexandr M. Tcaciuc, Pedro A. de Buen, Peter D. Spear, Sergey V. Uchaykin, Colin C. Enderud, Richard D. Neufeld, Jeremy P. Hilton, J. Craig Petroff, Amar B. Kamdar, Gregory D. Peregrym, Edmond Ho Yin Kan, Loren J. Swenson, George E. G. Sterling, Gregory Citver
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Publication number: 20200084882Abstract: Systems, methods, and devices for electrically coupling an integrated circuit to a set of coaxial lines via a printed circuit board assembly are described. A device sample holder includes a printed circuit board that is operable to edge-couple to an integrated circuit. A surface of the printed circuit board that carries a set of coaxial connectors is orthogonal to another surface of the printed circuit board that exposes a set of conductive traces. The set of conductive traces are operable to electrically couple to a set of conductive paths of an integrated circuit to provide a communicative path between the integrated circuit and components of an input/output system in a refrigerated environment.Type: ApplicationFiled: September 4, 2019Publication date: March 12, 2020Inventor: Richard D. Neufeld
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Publication number: 20200068722Abstract: A multilayer circuit board structure includes superconducting connections to internal layers thereof, for example by inclusion of superconducting vias. Two or more panels can each comprise respective electrically insulative substrates, each have one or more through-holes, and also include a respective bimetal foil on at least a portion of a respective surface thereof, which is patterned to form traces. The bimetal foil includes a first metal that is non-superconductive in a first temperature range and a second metal that is superconductive in the first temperature range. The panels are plated to deposit a third metal on exposed traces of the second metal, the third metal superconductive in the first temperature range. Panels are join (e.g., laminated) to form at least a three-layer superconducting printed circuit board with an inner layer, two outer layers, and superconducting vias between the inner layer and at least one of the two outer layers.Type: ApplicationFiled: December 7, 2017Publication date: February 27, 2020Inventor: Richard D. Neufeld
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Patent number: 10097151Abstract: Systems and devices for providing differential input/output communication with a superconducting device are described. Each differential I/O communication is electrically filtered using a respective tubular filter structure incorporating superconducting lumped element devices and high frequency dissipation by metal powder epoxy. A plurality of such tubular filter structures is arranged in a cryogenic, multi-tiered assembly further including structural/thermalization supports and a device sample holder assembly for securing a device sample, for example a superconducting quantum processor. The interface between the cryogenic tubular filter assembly and room temperature electronics is achieved using hermetically sealed vacuum feed-through structures designed to receive flexible printed circuit board cable.Type: GrantFiled: August 9, 2017Date of Patent: October 9, 2018Assignee: D-Wave Systems Inc.Inventors: Murray C. Thom, Alexander M. Tcaciuc, Gordon Lamont, J. Craig Petroff, Richard D. Neufeld, David S. Bruce, Sergey V. Uchaykin
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Publication number: 20170373658Abstract: Systems and devices for providing differential input/output communication with a superconducting device are described. Each differential I/O communication is electrically filtered using a respective tubular filter structure incorporating superconducting lumped element devices and high frequency dissipation by metal powder epoxy. A plurality of such tubular filter structures is arranged in a cryogenic, multi-tiered assembly further including structural/thermalization supports and a device sample holder assembly for securing a device sample, for example a superconducting quantum processor. The interface between the cryogenic tubular filter assembly and room temperature electronics is achieved using hermetically sealed vacuum feed-through structures designed to receive flexible printed circuit board cable.Type: ApplicationFiled: August 9, 2017Publication date: December 28, 2017Inventors: Murray C. Thom, Alexander M. Tcaciuc, Gordon Lamont, J. Craig Petroff, Richard D. Neufeld, David S. Bruce, Sergey V. Uchaykin
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Publication number: 20170178018Abstract: An electrical filter includes a dielectric substrate with inner and outer coils about a first region and inner and outer coils about a second region, a portion of cladding removed from wires that form the coils and coupled to electrically conductive traces on the dielectric substrate via a solder joint in a switching region. An apparatus to thermally couple a superconductive device to a metal carrier with a through-hole includes a first clamp and a vacuum pump. A composite magnetic shield for use at superconductive temperatures includes an inner layer with magnetic permeability of at least 50,000; and an outer layer with magnetic saturation field greater than 1.2 T, separated from the inner layer by an intermediate layer of dielectric. An apparatus to dissipate heat from a superconducting processor includes a metal carrier with a recess, a post that extends upwards from a base of the recess and a layer of adhesive on top of the post. Various cryogenic refrigeration systems are described.Type: ApplicationFiled: December 16, 2016Publication date: June 22, 2017Inventors: Alexandr M. Tcaciuc, Pedro A. de Buen, Peter D. Spear, Sergey V. Uchaykin, Colin C. Enderud, Richard D. Neufeld, Jeremy P. Hilton, J. Craig Petroff, Amar B. Kamdar, Gregory D. Peregrym, Edmond Ho Yin Kan, Loren J. Swenson, George E.G. Sterling, Gregory Citver
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Patent number: 5073755Abstract: A dielectric test device formed on a substrate which includes a conductive ground plane layer formed over the substrate, a dielectric layer over the ground plane layer and a short and long conductive strip overlying the dielectric layer. Each of the long and short strips extends between common input and output conductive pads and are substantially identical in all respects except for length. Measurement of the interference pattern at the output node resulting from an input signal of a single frequency applied to the input node as frequency is varied over the gigahertz range allows the calculation of effective dielectric constant, propagation velocity as a function of frequency and attenuation.Type: GrantFiled: March 19, 1990Date of Patent: December 17, 1991Assignee: MPR Teltech Ltd.Inventor: Richard D. Neufeld