Patents by Inventor Richard D. Tax

Richard D. Tax has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6593789
    Abstract: A precise and programmable duty cycle generator which can produce a user definable duty cycle clock signal with precision. This circuit is comprised of a number of generally known circuit elements such as a digital to analog converter (DAC), low pass filter (LPF) and operational transconductance amplifier (OTA), as well as a unique voltage controlled duty cycle generator (VCDCG). The circuit has the ability to produce a user programmable duty cycle clock signal with precision over a broad range of operational frequencies. The VCDCG circuit is unique and employs a number of stages, each of which has a current starved inverter which is immediately followed by a conventional inverter to allow duty cycle corrections to be either additive or subtractive. The current starved inverters are controlled by a single voltage, which causes the current starved inverter's delay to degrade/improve on only one transition to effect a change in the duty cycle.
    Type: Grant
    Filed: December 14, 2001
    Date of Patent: July 15, 2003
    Assignee: International Business Machines Corporation
    Inventors: Francois I. Atallah, Anthony Correale, Jr., David J. Seman, Richard D. Tax
  • Publication number: 20030112046
    Abstract: A precise and programmable duty cycle generator which can produce a user definable duty cycle clock signal with precision. This circuit is comprised of a number of generally known circuit elements such as a digital to analog converter (DAC), low pass filter (LPF) and operational transconductance amplifier (OTA), as well as a unique voltage controlled duty cycle generator (VCDCG). The circuit has the ability to produce a user programmable duty cycle clock signal with precision over a broad range of operational frequencies. The VCDCG circuit is unique and employs a number of stages, each of which has a current starved inverter which is immediately followed by a conventional inverter to allow duty cycle corrections to be either additive or subtractive. The current starved inverters are controlled by a single voltage, which causes the current starved inverter's delay to degrade/improve on only one transition to effect a change in the duty cycle.
    Type: Application
    Filed: December 14, 2001
    Publication date: June 19, 2003
    Applicant: International Business Machines Corporation
    Inventors: Francois I. Atallah, Anthony Correale, David J. Seman, Richard D. Tax