Patents by Inventor Richard David Price
Richard David Price has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240234185Abstract: The invention relates to a system for manufacturing a plurality of integrated circuits, IC, mounted on a common support, the system comprising: an input station configured (adapted, arranged) to receive at least one common support; an output station configured (adapted, arranged) to receive at least one common support having a plurality of integrated circuits formed thereon; a plurality of processing modules each module being operable (configured, arranged, adapted) to perform at least one of the processing steps (e.g. deposition, patterning, etching) for forming an integrated circuit on the common support; a transfer means operable (configured, arranged, adapted) to transfer the at least one common support from the input station to the output station and to one or more of the processing modules therebetween; control means (e.g.Type: ApplicationFiled: December 29, 2023Publication date: July 11, 2024Inventors: Richard David PRICE, Neil DAVIES, Scott WHITE, Thomas Stanley VAN DEN HEEVER, Kenneth David WILLIAMSON, Nathaniel James GREEN
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Publication number: 20240136211Abstract: The invention relates to a system for manufacturing a plurality of integrated circuits, IC, mounted on a common support, the system comprising: an input station configured (adapted, arranged) to receive at least one common support; an output station configured (adapted, arranged) to receive at least one common support having a plurality of integrated circuits formed thereon; a plurality of processing modules each module being operable (configured, arranged, adapted) to perform at least one of the processing steps (e.g. deposition, patterning, etching) for forming an integrated circuit on the common support; a transfer means operable (configured, arranged, adapted) to transfer the at least one common support from the input station to the output station and to one or more of the processing modules therebetween; control means (e.g.Type: ApplicationFiled: December 29, 2023Publication date: April 25, 2024Inventors: Richard David PRICE, Neil DAVIES, Scott WHITE, Thomas Stanley VAN DEN HEEVER, Kenneth David WILLIAMSON, Nathaniel James GREEN
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Publication number: 20210074563Abstract: The invention relates to a system for manufacturing a plurality of integrated circuits, IC, mounted on a common support, the system comprising: an input station configured (adapted, arranged) to receive at least one common support; an output station configured (adapted, arranged) to receive at least one common support having a plurality of integrated circuits formed thereon; a plurality of processing modules each module being operable (configured, arranged, adapted) to perform at least one of the processing steps (e.g. deposition, patterning, etching) for forming an integrated circuit on the common support; a transfer means operable (configured, arranged, adapted) to transfer the at least one common support from the input station to the output station and to one or more of the processing modules therebetween; control means (e.g.Type: ApplicationFiled: January 30, 2019Publication date: March 11, 2021Inventors: Richard David PRICE, Neil DAVIES, Scott WHITE, Thomas Stanley VAN DEN HEEVER, Kenneth David WILLIAMSON, Nathaniel James GREEN
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Patent number: 10811383Abstract: A method of manufacturing a plurality of electronic circuits is disclosed. Each electronic circuit comprises a respective first portion, comprising a respective group of contact pads, and a respective integrated circuit, IC, comprising a respective group of terminals and mounted on the respective group of contact pads with each terminal in electrical contact with a respective contact pad. The method comprises: providing a first structure comprising the plurality of first portions; providing a second structure comprising the plurality of ICs and a common support arranged to support the plurality of ICs; transferring said ICs from the common support onto a first roller; transferring said ICs from the first roller onto a second roller; and transferring said ICs from the second roller onto the first structure such that each group of terminals is mounted on a respective group of contact pads.Type: GrantFiled: February 9, 2017Date of Patent: October 20, 2020Assignee: PRAGMATIC PRINTING LTD.Inventors: Neil Davies, Richard David Price, Stephen Devenport, Stuart Philip Speakman
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Publication number: 20190067243Abstract: A method of manufacturing a plurality of electronic circuits is disclosed. Each electronic circuit comprises a respective first portion, comprising a respective group of contact pads, and a respective integrated circuit, IC, comprising a respective group of terminals and mounted on the respective group of contact pads with each terminal in electrical contact with a respective contact pad. The method comprises: providing a first structure comprising the plurality of first portions; providing a second structure comprising the plurality of ICs and a common support arranged to support the plurality of ICs; transferring said ICs from the common support onto a first roller; transferring said ICs from the first roller onto a second roller; and transferring said ICs from the second roller onto the first structure such that each group of terminals is mounted on a respective group of contact pads.Type: ApplicationFiled: February 9, 2017Publication date: February 28, 2019Inventors: Neil DAVIES, Richard David PRICE, Stephen DEVENPORT, Stuart Philip SPEAKMAN
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Patent number: 10020377Abstract: A method of manufacturing an electronic device comprising a first terminal (e.g. a source terminal), a second terminal (e.g. a drain terminal), a semiconductor channel connecting the first and second terminals and a gate terminal to which a potential may be applied to control a conductivity of the channel. The method comprises a first exposure of a photoresist from above the substrate using a mask and a second exposure from below, wherein in the second exposure the first and second terminals shield a part of the photoresist from exposure. An intermediate step reduces the solubility of the photoresist exposed in the first exposure. A window is formed in the photoresist at the location which was shielded by the mask, but exposed to radiation from below. Semiconductor material, dielectric material and conductor material are deposited inside the window to form a semiconductor channel, gate dielectric, and a gate terminal, respectively.Type: GrantFiled: November 7, 2016Date of Patent: July 10, 2018Assignee: Pragmatic Printing LimitedInventors: John James Gregory, Richard David Price
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Publication number: 20170278945Abstract: A method of manufacturing an electronic device comprising a first terminal (e.g. a source terminal), a second terminal (e.g. a drain terminal), a semiconductor channel connecting the first and second terminals and a gate terminal to which a potential may be applied to control a conductivity of the channel. The method comprises a first exposure of a photoresist from above the substrate using a mask and a second exposure from below, wherein in the second exposure the first and second terminals shield a part of the photoresist from exposure. An intermediate step reduces the solubility of the photoresist exposed in the first exposure. A window is formed in the photoresist at the location which was shielded by the mask, but exposed to radiation from below. Semiconductor material, dielectric material and conductor material are deposited inside the window to form a semiconductor channel, gate dielectric, and a gate terminal, respectively.Type: ApplicationFiled: November 7, 2016Publication date: September 28, 2017Applicant: Pragmatic Printing LtdInventors: John James Gregory, Richard David Price
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Patent number: 9601597Abstract: A method of manufacturing a substantially planar electronic device is disclosed. The method employs a resist having three different thicknesses used for defining different structures in a single masking step. Exemplary structures are substantially planar transistors having side-gates and diodes.Type: GrantFiled: February 21, 2013Date of Patent: March 21, 2017Assignee: Pragmatic Printing LimitedInventors: Antony Colin Fryer, Richard David Price
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Patent number: 9520481Abstract: A method of manufacturing an electronic device comprising a first terminal (e.g. a source terminal), a second terminal (e.g. a drain terminal), a semiconductor channel connecting the first and second terminals and a gate terminal to which a potential may be applied to control a conductivity of the channel. The method comprises a first exposure of a photoresist from above the substrate using a mask and a second exposure from below, wherein in the second exposure the first and second terminals shield a part of the photoresist from exposure. An intermediate step reduces the solubility of the photoresist exposed in the first exposure. A window is formed in the photoresist at the location which was shielded by the mask, but exposed to radiation from below. Semiconductor material, dielectric material and conductor material are deposited inside the window to form a semiconductor channel, gate dielectric, and a gate terminal, respectively.Type: GrantFiled: February 13, 2013Date of Patent: December 13, 2016Assignee: Pragmatic Printing LimitedInventors: John James Gregory, Richard David Price
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Patent number: 9263553Abstract: A transistor includes a substrate, a source terminal and a drain terminal, each terminal being supported by the substrate, and the source and drain terminal being separated by a portion of the substrate, a layer of semiconductive material deposited so as to cover the portion of the substrate and to connect the source terminal to the drain terminal, a layer of dielectric material deposited so as to cover at least a portion of the layer of semiconductive material, and a layer of electrically conductive material deposited so as to cover at least a portion of the layer of dielectric material. The layer of electrically conductive material providing a gate terminal to which a potential may be applied to control a conductivity of the layer of semiconductive material connecting the source and drain terminals.Type: GrantFiled: March 29, 2011Date of Patent: February 16, 2016Assignee: Pragmatic Printing LimitedInventor: Richard David Price
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Publication number: 20160020299Abstract: A method of manufacturing an electronic device comprising a first terminal (e.g. a source terminal), a second terminal (e.g. a drain terminal), a semiconductor channel connecting the first and second terminals and a gate terminal to which a potential may be applied to control a conductivity of the channel. The method comprises a first exposure of a photoresist from above the substrate using a mask and a second exposure from below, wherein in the second exposure the first and second terminals shield a part of the photoresist from exposure. An intermediate step reduces the solubility of the photoresist exposed in the first exposure. A window is formed in the photoresist at the location which was shielded by the mask, but exposed to radiation from below. Semiconductor material, dielectric material and conductor material are deposited inside the window to form a semiconductor channel, gate dielectric, and a gate terminal, respectively.Type: ApplicationFiled: February 13, 2013Publication date: January 21, 2016Applicant: Pragmatic Printing LtdInventors: John James Gregory, Richard David Price
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Patent number: 9018096Abstract: A method of manufacturing a structure comprising substantially planar electronic devices comprises providing an active material layer having a plurality of insulative features formed therein. The features at least partly inhibit electrical current flow and define at least a first substantially planar electronic device in the layer having at least first and second terminals comprising an area of the active material layer. A patterned dielectric layer having an exposed surface patterned with at least a first depression arranged over the first terminal is formed over the active material layer. Dielectric material is removed from at least a base of the first depression to expose a first terminal surface and form a hole through the dielectric material to the first terminal. The hole is at least partly filled with electrically conductive material to form an electrical connection to the first terminal. Corresponding structures and electrical circuits are also described and claimed.Type: GrantFiled: September 2, 2010Date of Patent: April 28, 2015Assignee: Pragmatic Printing Ltd.Inventors: Richard David Price, Ian Barton
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Publication number: 20150001597Abstract: A method of manufacturing a substantially planar electronic device is disclosed. The method employs a resist having three different thicknesses used for defining different structures in a single masking step. Exemplary structures are substantially planar transistors having side-gates and diodes.Type: ApplicationFiled: February 21, 2013Publication date: January 1, 2015Applicant: PRAGMATIC PRINTING LIMITEDInventors: Antony Colin Fryer, Richard David Price
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Publication number: 20130020643Abstract: A transistor includes a substrate, a source terminal and a drain terminal, each terminal being supported by the substrate, and the source and drain terminal being separated by a portion of the substrate, a layer of semiconductive material deposited so as to cover the portion of the substrate and to connect the source terminal to the drain terminal, a layer of dielectric material deposited so as to cover at least a portion of the layer of semiconductive material, and a layer of electrically conductive material deposited so as to cover at least a portion of the layer of dielectric material. The layer of electrically conductive material providing a gate terminal to which a potential may be applied to control a conductivity of the layer of semiconductive material connecting the source and drain terminals.Type: ApplicationFiled: March 29, 2011Publication date: January 24, 2013Inventor: Richard David Price
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Publication number: 20120153502Abstract: A method of manufacturing a structure comprising substantially planar electronic devices comprises providing an active material layer having a plurality of insulative features formed therein. The features at least partly inhibit electrical current flow and define at least a first substantially planar electronic device in the layer having at least first and second terminals comprising an area of the active material layer. A patterned dielectric layer having an exposed surface patterned with at least a first depression arranged over the first terminal is formed over the active material layer. Dielectric material is removed from at least a base of the first depression to expose a first terminal surface and form a hole through the dielectric material to the first terminal. The hole is at least partly filled with electrically conductive material to form an electrical connection to the first terminal. Corresponding structures and electrical circuits are also described and claimed.Type: ApplicationFiled: September 2, 2010Publication date: June 21, 2012Inventors: Richard David Price, Ian Barton
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Patent number: 7303824Abstract: An electroluminescent device which has an electroluminescent layer formed of a binuclear, trinuclear or polynuclear rare earth organic complex in which the metals are linked through a bridging ligand.Type: GrantFiled: August 5, 2002Date of Patent: December 4, 2007Assignee: OLED-T LimitedInventors: Poopathy Kathirgamanathan, Lisa Marie Bushby, Richard David Price
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Publication number: 20040253477Abstract: An electroluminescent device which has an electroluminescent layer formed of a binuclear, trinuclear or polynuclear rare earth organic complex in which the metals are linked through a bridging ligand.Type: ApplicationFiled: April 19, 2004Publication date: December 16, 2004Inventors: Poopathy Kathirgamanathan, Lisa Marie Bushby, Richard David Price
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Patent number: 5996722Abstract: A tractor (1) has front wheels (2), rear wheels (3) and carries an implement (7, 10) by a linkage (8) or tows a trailer (11). The front wheels (2) are steered normally by a steering wheel (6). The rear wheels (3) can be held in fixed alignment or they can be steered in various selectable modes, being slaved to the front wheels. In one mode, they are turned in the opposite direction to the front wheels, to give a very tight turning circle. In another mode, they turn with the front wheels but to a lesser degree, governed by the tractor wheel base (A) and the distance (B) of this implement behind the tractor, to keep lateral forces on the implement to a minimum. There can be automatic changeover between modes of steering.Type: GrantFiled: October 6, 1997Date of Patent: December 7, 1999Inventor: Richard David Price