Patents by Inventor Richard Delano

Richard Delano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9798556
    Abstract: A dynamic reconfiguration to include on-line addition, deletion, and replacement of individual modules of to support dynamic partitioning of a system, interconnect (link) reconfiguration, memory RAS to allow migration and mirroring without OS intervention, dynamic memory reinterleaving, CPU and socket migration, and support for global shared memory across partitions is described. To facilitate the on-line addition or deletion, the firmware is able to quiesce and de-quiesce the domain of interest so that many system resources, such as routing tables and address decoders, can be updated in what essentially appears to be an atomic operation to the software layer above the firmware.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: October 24, 2017
    Assignee: INTEL CORPORATION
    Inventors: Mani Ayyar, Eric Richard Delano, Ioannis Y. Schoinas, Akhilesh Kumar, Doddaballapur Jayasimha, Jose A. Vargas
  • Publication number: 20160196153
    Abstract: A dynamic reconfiguration to include on-line addition, deletion, and replacement of individual modules of to support dynamic partitioning of a system, interconnect (link) reconfiguration, memory RAS to allow migration and mirroring without OS intervention, dynamic memory reinterleaving, CPU and socket migration, and support for global shared memory across partitions is described. To facilitate the on-line addition or deletion, the firmware is able to quiesce and de-quiesce the domain of interest so that many system resources, such as routing tables and address decoders, can be updated in what essentially appears to be an atomic operation to the software layer above the firmware.
    Type: Application
    Filed: December 28, 2015
    Publication date: July 7, 2016
    Applicant: INTEL CORPORATION
    Inventors: MANI AYYAR, ERIC RICHARD DELANO, IOANNIS Y. SCHOINAS, AKHILESH KUMAR, DODDABALLAPUR JAYASIMHA, JOSE A. VARGAS
  • Patent number: 9223738
    Abstract: A dynamic reconfiguration to include on-line addition, deletion, and replacement of individual modules of to support dynamic partitioning of a system, interconnect (link) reconfiguration, memory RAS to allow migration and mirroring without OS intervention, dynamic memory reinterleaving, CPU and socket migration, and support for global shared memory across partitions is described. To facilitate the on-line addition or deletion, the firmware is able to quiesce and de-quiesce the domain of interest so that many system resources, such as routing tables and address decoders, can be updated in what essentially appears to be an atomic operation to the software layer above the firmware.
    Type: Grant
    Filed: November 2, 2012
    Date of Patent: December 29, 2015
    Assignee: Intel Corporation
    Inventors: Mani Ayyar, Eric Richard Delano, Ioannis Y. Schoinas, Akhilesh Kumar, Doddaballapur Jayasimha, Jose A. Vargas
  • Publication number: 20130304957
    Abstract: A dynamic reconfiguration to include on-line addition, deletion, and replacement of individual modules of to support dynamic partitioning of a system, interconnect (link) reconfiguration, memory RAS to allow migration and mirroring without OS intervention, dynamic memory reinterleaving, CPU and socket migration, and support for global shared memory across partitions is described. To facilitate the on-line addition or deletion, the firmware is able to quiesce and de-quiesce the domain of interest so that many system resources, such as routing tables and address decoders, can be updated in what essentially appears to be an atomic operation to the software layer above the firmware.
    Type: Application
    Filed: November 2, 2012
    Publication date: November 14, 2013
    Inventors: Mani Ayyar, Eric Richard Delano, Ioanns Y. Schoinas, Akhilesh Kumar, Doddaballapur Jayasimha, Jose A. Vargas
  • Patent number: 7296181
    Abstract: Techniques are disclosed, for use in a computer system including a plurality of processing units coupled over a system fabric, to identify a lockstep error associated with a first packet to be transmitted over the system fabric; set a viral indicator in the first packet to indicate the lockstep error; and transmit the modified packet over the system fabric.
    Type: Grant
    Filed: April 6, 2004
    Date of Patent: November 13, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Kevin David Safford, Eric Richard Delano
  • Patent number: 7290169
    Abstract: A device is provided which includes a first microprocessor core to generate a first output signal; a second microprocessor core to generate a second output signal; a switching fabric having a first input/output port; and lockstep logic, coupled between the first input/output port of the switching fabric and the first and second microprocessor cores, to detect whether the first output signal differs from the second output signal.
    Type: Grant
    Filed: April 6, 2004
    Date of Patent: October 30, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Kevin David Safford, Christopher L. Lyles, Eric Richard Delano
  • Patent number: 7237144
    Abstract: A system is provided which includes a microprocessor comprising a first processing unit to generate a first output signal and a second processing unit to generate a second output signal, and comparison means, coupled to the microprocessor, to detect whether the first output signal differs from the second output signal.
    Type: Grant
    Filed: April 6, 2004
    Date of Patent: June 26, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Kevin David Safford, Donald Charles Soltis, Jr., Eric Richard Delano
  • Patent number: 7131800
    Abstract: A circuit board router (10) and method thereof. De-paneling of printed circuit boards (62) off a panel 860) is efficiently increased by a router (40) which is positioned at a location above the panel (60). A fixture positions the panel 860) below the router (40) on a base (16). A controller (64) activates a first drive mechanism (20), a second drive mechanism (26), and a third drive mechanism (32) to guide an X-arm (18), a Y-arm (24) and a Z-arm (10), respectively. The router (40), located on the Z-arm (30), moves downward to engage a router bit (42) to the panel (60) to depanel the printed circuit board (62) from the panel. A fixture chip (72), which has a preprogrammed pattern of the panel (60), is embedded inside the fixture (58). A radio frequency transmitter (80) transmits the pattern to a radio frequency receiver (82) that relays the pattern to the controller (64).
    Type: Grant
    Filed: January 16, 2002
    Date of Patent: November 7, 2006
    Assignee: Tyco Electronics Corporation
    Inventors: William Neil Anderson, Michael Steven Stanard, William Richard Delano
  • Patent number: 4877675
    Abstract: In greenhouses and other stuctures an excessive amount of sunlight on a hot day may cause overheating or may cause uneven lighting. A sheet is provided which is normally transparent but which becomes white and light-reflective at a predetermined temperature to help keep the structure cooled or help keep its lighting at a constant level. This color is reversible so that the sheet becomes transparent when the temperature falls. In one embodiment, the sheet consists of a unitary transparent plastic resin structure formed with elongated cells which are filled with a thick and viscous gel containing poly (vinyl methyl ether) or other suitable "cloud point" material. The gel helps prevent loss of water through the cell walls and prevents gaps which may occur from migration over repeated cycles of precipitation of the cloud point material, i.e., it helps keep the mixture homogeneous.
    Type: Grant
    Filed: September 29, 1988
    Date of Patent: October 31, 1989
    Inventors: Waqidi Falicoff, Richard Delano, Chad J. Raseman