Abstract: A method of fabricating a color filter array including providing substrate, forming a multilevel structure that is attached to the substrate, etching the multilevel structure to expose first wells in the multilevel structure, filling at least the first wells in the multilevel structure with the first color component, curing the first color component, etching the multilevel structure to expose second wells in the multilevel structure, filling at least the second wells in the multilevel structure with a second color component, and curing the second color component.

Abstract: A method of fabricating a color filter array including providing substrate, forming a multilevel structure that is attached to the substrate, etching the multilevel structure to expose first wells in the multilevel structure, filling at least the first wells in the multilevel structure with the first color component, curing the first color component, etching the multilevel structure to expose second wells in the multilevel structure, filling at least the second wells in the multilevel structure with a second color component, and curing the second color component.

Abstract: A method of fabricating a color filter array including providing substrate, forming a multilevel structure that is attached to the substrate, etching the multilevel structure to expose first wells in the multilevel structure, filling at least the first wells in the multilevel structure with the first color component, curing the first color component, etching the multilevel structure to expose second wells in the multilevel structure, filling at least the second wells in the multilevel structure with a second color component, and curing the second color component.

Abstract: An electronic apparatus is provided that includes a number of first components on a first substrate and a number of second components on a second substrate. A lamination material that includes a conducting material is placed between the first components and the second components. Any one first component can couple to a varied subset of second components.

Abstract: A method of fabricating a color filter array including providing substrate, forming a multilevel structure that is attached to the substrate, etching the multilevel structure to expose first wells in the multilevel structure, filling at least the first wells in the multilevel structure with the first color component, curing the first color component, etching the multilevel structure to expose second wells in the multilevel structure, filling at least the second wells in the multilevel structure with a second color component, and curing the second color component.

Abstract: Pixel circuits (100, 300) and related methods are provided. In this regard, a representative pixel circuit includes: a data line (104, 304) operative to carry a data signal; a select line (106, 306) operative to carry a select signal; a first thin film transistor (TFT) (T1, T1A) conductively coupled to the data line and to the select line; and a second TFT (T2, T2A) capacitively coupled to the first TFT, the second TFT being operative to drive an emissive load responsive to the data signal and the select signal; wherein the data signal is provided to the second TFT through capacitive coupling.

Abstract: An electronic apparatus is provided that includes a number of first components on a first substrate and a number of second components on a second substrate. A lamination material that includes a conducting material is placed between the first components and the second components. Any one first component can couple to a varied subset of second components.

Abstract: An aspect of the present invention is a logical arrangement of memory arrays. The logical arrangement includes a plurality of memory arrays deposed in a row-column configuration, a controller coupled to the plurality of memory arrays and at least one power line, at least one sense line and at least one address line coupled to the controller wherein a number of connections from the controller to the at least one power line, the at least one sense line and the at least one address line is minimized.

Abstract: A defect management enabled PIRM including a data storage medium providing a plurality of cross point data storage arrays. Each array provides a plurality of memory cells. The arrays are allocated into separate super arrays, the separate super arrays virtually aligned as sets. A controller is also provided, capable of establishing the selection of a virtually aligned set of arrays and a virtually aligned set of memory cells. The controller is operable during a write operation to receive a word of data bits and detect a defective array in the selected virtually aligned set of memory arrays. The controller is further capable of directing the allocation of at least one data bit from the defective memory array to a spare memory array.

Abstract: An optical disk and compatible optical disk drive enabling erasable (rewritable) optical disks to have the same format and capacity as read-only or (recordable) write-once optical disks. A reference clock track and optional additional prerecorded phase synchronization patters are provided to enable writing of any random sector with frequency and phase matching of a random sector to the preceding and following sectors. The reference clock track and other phase synchronization patterns eliminate the need for preambles and extra space for speed variation. In a first embodiment, a disk has multiple layers, with at least one rewritable data layer and at least one reference layer. A spiral track on a surface of the reference layer has prerecorded patterns to be used for clocking. In a variation of first embodiment, the reference layer is also used for radial tracking control, eliminated the need for predefined tracks in the rewritable data layers.

Abstract: An electrically addressable device for recording, addressing and reading of data, includes a storage array unit having multiple layers of data storage medium. An electrical marking device is disposed on at least one of the layers of storage medium of the storage array unit to provide a display indicating any pre-selected information, such as the nature of the content of the data stored on the storage array unit. The electrical marking device may comprise at least one layer functioning as a display layer that is partially visually altered to provide a display of information, such as to display the subject matter and name of the content of the data and the amount of memory storage that has been used. The display layer comprises a plurality of information storage cells, each representing the value of at least one data bit, wherein the visual appearance of each of the information storage cell is varied depending on the value of the data bit.

Abstract: An optical disk and compatible optical disk drive enabling erasable (rewritable) optical disks to have the same format and capacity as read-only or (recordable) write-once optical disks. A reference clock track and optional additional prerecorded phase synchronization patters are provided to enable writing of any random sector with frequency and phase matching of a random sector to the preceding and following sectors. The reference clock track and other phase synchronization patterns eliminate the need for preambles and extra space for speed variation. In a first embodiment, a disk has multiple layers, with at least one rewritable data layer and at least one reference layer. A spiral track on a surface of the reference layer has prerecorded patterns to be used for clocking. In a variation of first embodiment, the reference layer is also used for radial tracking control, eliminated the need for predefined tracks in the rewritable data layers.

Abstract: An optical disk and compatible optical disk drive enabling erasable (rewritable) optical disks to have the same format and capacity as read-only or (recordable) write-once optical disks. A reference clock track and optional additional prerecorded phase synchronization patters are provided to enable writing of any random sector with frequency and phase matching of a random sector to the preceding and following sectors. The reference clock track and other phase synchronization patterns eliminate the need for preambles and extra space for speed variation. In a first embodiment, a disk has multiple layers, with at least one rewritable data layer and at least one reference layer. A spiral track on a surface of the reference layer has prerecorded patterns to be used for clocking. In a variation of first embodiment, the reference layer is also used for radial tracking control, eliminated the need for predefined tracks in the rewritable data layers.

Abstract: An electrostatic actuator having two-dimensional in-plane motion of a monolithic element suspended by flexures which is unstable in the open-loop and uses feedback control to operate. By adding a common bias voltage to each of the stator electrodes when the translator and stator are in the unstable equilibrium position, repulsion can be reduced to zero while the in-plane force remains in unstable equilibrium. Stabilizing the in-plane force at the unstable equilibrium position is achieved by shifting the electrical phase of the stator potential distribution in a direction to produce an in-plane force which opposes motion of the translators away from the equilibrium position. Linear control and pulse width modulation control permit altering the phase by less than the stator pitch.

Abstract: An optical disk and compatible optical disk drive enabling erasable (rewritable) optical disks to have the same format and capacity as read-only or (recordable) write-once optical disks. A reference clock track and optional additional prerecorded phase synchronization patterns are provided to enable writing of any random sector with frequency and phase matching of a random sector to the preceding and following sectors. The reference clock track and other phase synchronization patterns eliminate the need for preambles and extra space for speed variation. In a first embodiment, a disk has multiple layers, with at least one rewritable data layer and at least one reference layer. A spiral track on a surface of the reference layer has prerecorded patterns to be used for clocking. In a variation of first embodiment, the reference layer is also used for radial tracking control, eliminating the need for predefined tracks in the rewritable data layers.