Abstract: A switch matrix system is described with which peripheral devices can be conveniently tested for compatibility with central processor units. A diagnostic channel is provided to which a peripheral device to be tested is connected at a crosspoint in the switch matrix system. A control provides a sequence of signals needed to establish data communication between the central processor unit and the peripheral device. Errors or failures in the sequence are detected and stored and displayed with a terminal from which the switch matrix system is operated. Additional testing is done by generating bit test patterns and comparing the returns with those sent out. A channel activity monitor is employed in the switch matrix system to enable a comparative review of activity of channels from different central processor units.

Abstract: An apparatus for controlling electrical power in a data processing system having one or more central processor units and a plurality of peripheral units, including circuitry for selectively connecting a voltage signal to each peripheral unit to cause power to be supplied thereto, and metering means for measuring the amount of time the voltage signal is provided to each separate peripheral whereby the supply of power to any one of the peripheral units may be centrally controlled and monitored. Also included is a circuit for sequentially connecting the voltage signal to the peripheral units.