Abstract: In one aspect, an electrical signal converter is disclosed. The exemplary electrical signal converter may include a plurality of ordered converter elements. Element selection logic may be provided to pseudorandomly select a pointer to a switch matrix, wherein the switch matrix maps converter elements according to a stepwise “delta-two-maximum pattern.” Advantageously, pseudorandom stepwise delta-two-maximum patterns may be applied both to a first order converter, and to a feedback converter for error correction.

Abstract: In one example implementation, the present disclosure provides a loop filter for use in a continuous-time sigma-delta analog-to-digital converter. Specifically, a capacitive feedback digital-to-analog converter path is provided at the input of a first opamp in a series of opamp integrators. The capacitive feedback digital-to-analog converter at the input of the first opamp reduces the signal content at the output of the first opamp, and thereby reduces the output swing of the first opamp. A reduction in output swing provides a more efficient loop filter.

Abstract: An integrated circuit includes a component calculator configured to compute at least one component value of a highly programmable analog-to-digital converter (ADC) from at least one application parameter, and a mapping module configured to map the component value to a corresponding register setting of the ADC based on at least one process parameter, wherein the integrated circuit produces digital control signals capable of programming the ADC. In a specific embodiment, the component calculator uses an algebraic function of a normalized representation of the application parameter to approximately evaluate at least one normalized ADC coefficient. The component value is further calculated by denormalizing the normalized ADC coefficient. In another specific embodiment, the component calculator uses an algebraic function of the application parameter to calculate the component value.

Abstract: In one example implementation, the present disclosure provides a loop filter for use in a continuous-time sigma-delta analog-to-digital converter. Specifically, a capacitive feedback digital-to-analog converter path is provided at the input of a first opamp in a series of opamp integrators. The capacitive feedback digital-to-analog converter at the input of the first opamp reduces the signal content at the output of the first opamp, and thereby reduces the output swing of the first opamp. A reduction in output swing provides a more efficient loop filter.

Abstract: The present disclosure describes an improved multi-stage noise shaping (MASH) analog-to-digital converter (ADC) for converting an analog input signal to a digital output signal. In particular, a full delta-sigma (??) modulator is provided at the front-end of the MASH ADC, and another full ?? modulator is provided at the back-end of the MASH ADC. The front-end ?? modulator digitizes an analog input signal, and the back-end ?? modulator digitizes an error between the output of the front-end ?? modulator and the (original) analog input signal. In this configuration where the back-end modulator digitizes the error of the (full) front-end modulator, some design constraints of the front-end are relaxed. These design constraints include thermal noise, digital noise cancellation filter complexity (the quantization noise of the front-end is already shaped by the noise transfer function of the front-end), and/or non-linearity.

Abstract: A delta-sigma modulator is configured to sense and convert an electromagnetic field into a digital signal. An exemplary delta-sigma modulator includes a sensor component, such as an LC resonator, that is configured to sense the electromagnetic field and generate an input analog signal, where the delta-sigma modulator is configured to convert the input analog signal to the digital signal. Delta-sigma modulator can include an analog-to-digital converter coupled to the sensor component that receives and converts the input analog signal to the digital signal. Delta-sigma modulator can further include a digital-to-analog converter (DAC) coupled to the resonator and the ADC, the DAC configured to receive the digital signal from the ADC and generate a feedback analog signal.

Abstract: An integrated circuit includes a component calculator configured to compute at least one component value of a highly programmable analog-to-digital converter (ADC) from at least one application parameter, and a mapping module configured to map the component value to a corresponding register setting of the ADC based on at least one process parameter, wherein the integrated circuit produces digital control signals capable of programming the ADC. In a specific embodiment, the component calculator uses an algebraic function of a normalized representation of the application parameter to approximately evaluate at least one normalized ADC coefficient. The component value is further calculated by denormalizing the normalized ADC coefficient. In another specific embodiment, the component calculator uses an algebraic function of the application parameter to calculate the component value.

Abstract: In one aspect, an electrical signal converter is disclosed. The exemplary electrical signal converter may include a plurality of ordered converter elements. Element selection logic may be provided to pseudorandomly select a pointer to a switch matrix, wherein the switch matrix maps converter elements according to a stepwise “delta-two-maximum pattern.” Advantageously, pseudorandom stepwise delta-two-maximum patterns may be applied both to a first order converter, and to a feedback converter for error correction.

Abstract: In one aspect, an electrical signal converter is disclosed. The exemplary electrical signal converter may include a plurality of ordered converter elements. Element selection logic may be provided to pseudorandomly select a pointer to a switch matrix, wherein the switch matrix maps converter elements according to a stepwise “delta-two-maximum pattern.” Advantageously, pseudorandom stepwise delta-two-maximum patterns may be applied both to a first order converter, and to a feedback converter for error correction.

Abstract: A voltage generator may include a plurality of charge pumps, plural sets of delay pipelines and a phase controller. Given M delay pipelines having N stages each, there may be M*N charge pumps each having a triggering input coupled to a respective stage or a respective pipeline. The phase controller may include a plurality of phase control stages interconnecting among the delay pipelines to induce timing offsets among the outputs of the delay stage. In an alternate design, intermediate nodes among the pipeline's delay stages may be coupled to triggering inputs of a sub-set of the charge pumps. The phase controller may have a plurality of phase control stages coupled, respectively, between the intermediate nodes of the delay pipeline and intermediate nodes of the phase control stages may be coupled to triggering inputs of another sub-set of the charge pumps.

Abstract: An improved ?? analog to digital converter system with automatic gain control response to out-of-band interferers including a ?? multibit analog to digital converter responsive to an analog input for providing a digital output including the in-band signal and out-of-band interferers and quantization noise and a signal peak estimator circuit responsive to the out-of-band interferers for generating a gain control signal for adjusting the gain of a variable gain element which may be an independent element such as a variable gain amplifier or it may be the analog to digital converter itself by virtue of its having an adjustable full-scale.

Abstract: A low-noise programmable current source includes an output digital to analog converter for providing an output load current; and a control circuit, responsive to an input defining a predetermined load current for generating, for the digital to analog converter, a control word and a control voltage; the control word and the control voltage drive the digital to analog converter to produce the predetermined load current and the control voltage sets the compliance voltage of the digital to analog converter to minimize current noise in the digital to analog converter.

Abstract: A mismatch shaping ?? analog to digital converter system includes a plurality of internal ?? analog to digital submodulators to provide an output; a feedback circuit including a feedback digital to analog converter responsive to the output; a summing circuit for providing the difference of an analog input and the output of the feedback circuit; and a loop filter responsive to the summing circuit and having a plurality of stages, the last stage of which is distributed to and functions as a loop filter stage in each of the plurality of analog to digital submodulators for attenuating the mismatch noise of the feedback digital to analog converter in the pass band of the ?? analog to digital converter system.

Abstract: A low-noise programmable current source includes an output digital to analog converter for providing an output load current; and a control circuit, responsive to an input defining a predetermined load current for generating, for the digital to analog converter, a control word and a control voltage; the control word and the control voltage drive the digital to analog converter to produce the predetermined load current and the control voltage sets the compliance voltage of the digital to analog converter to minimize current noise in the digital to analog converter.

Abstract: A continuous time ?? modulation system with automatic timing adjustment includes a loop filter having continuous time elements for receiving an input; and an ADC for sampling the output from the loop filter in response to an ADC clock; a DAC responsive to the output from the ADC for feeding back an input to the loop filter in response to a DAC clock; a timing measurement circuit for detecting a difference in the timing of the ADC sampling time and the DAC update time and a timing adjustment circuit responsive to the timing measurement circuit for adjusting the timing of at least one of the DAC and ADC clocks for aligning their respective update and sampling times.

Abstract: An improved quadrature bandpass ?? converter includes a loop filter, an ADC responsive to the loop filter, and a first feedback DAC responsive to the ADC; a first summing circuit is responsive to the first DAC and an analog input for providing an input to the loop filter; a second feedback DAC is responsive to the ADC for providing an input to the loop filter; the loop filter includes a plurality of signal resonators, at least one image resonator, a second summing circuit, and a feed forward circuit connecting at least two of the resonators to the second summing circuit for reducing the quantization noise from the ADC; the image resonator is responsive to the second DAC for reducing the image quantization noise.