Patents by Inventor Richard Earl Jones, Jr.

Richard Earl Jones, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11901060
    Abstract: The present disclosure relates to systems and methods for controlling physiological glucose concentrations in a patient.
    Type: Grant
    Filed: December 14, 2018
    Date of Patent: February 13, 2024
    Assignee: Ypsomed AG
    Inventors: Yamei Chen, Haoda Fu, Parag Garhyan, Ahmad Mohamad Haidar, Richard Earl Jones, Jr., Christopher Kovalchick, Marie Kearney Schiller, Monica Rixman Swinney, Howard Allan Wolpert
  • Publication number: 20230218821
    Abstract: A system includes a controller that is in communication with a medication delivery device and that includes control logic. The control logic is operative to calculate a first filtered total daily dose (TDD) during an initial tracking phase based, at least in part, on a first set of insulin delivery doses and subject to a first set of rate limits. The control logic is also operative to calculate a second filtered TDD during a steady state tracking phase based, at least in part, on a second set of insulin delivery doses and subject to a second set of rate limits.
    Type: Application
    Filed: May 7, 2021
    Publication date: July 13, 2023
    Inventors: Amy Kathleen BARTEE, Ahmad Mohamad HAIDAR, Richard Earl JONES, Jr.
  • Publication number: 20200342974
    Abstract: The present disclosure relates to systems and methods for controlling physiological glucose concentrations in a patient.
    Type: Application
    Filed: December 14, 2018
    Publication date: October 29, 2020
    Inventors: Yamei CHEN, Haoda FU, Parag GARHYAN, Ahmad Mohamad HAIDAR, Richard Earl JONES, Jr., Christopher KOVALCHICK, Marie Kearney SCHILLER, Monica Rixman SWINNEY, Howard Allan WOLPERT
  • Patent number: 9774847
    Abstract: A dual-port testing apparatus is provided for testing a cable network at two test points. The testing may comprise demodulation of a same data packet at the test points, decoding the data packet, performing spectral analysis of the signal, etc. Testing results may be correlated with one another, both visually and by using pre-defined test metrics comprising a weighted sum of demodulation and decoding parameters such as modulation extinction ratio and a codeword error.
    Type: Grant
    Filed: May 20, 2016
    Date of Patent: September 26, 2017
    Assignee: VIAVI SOLUTIONS INC.
    Inventors: Daniel K. Chappell, Richard Earl Jones, Jr., David W. Jones, Adam D. Gray
  • Publication number: 20170019664
    Abstract: A dual-port testing apparatus is provided for testing a cable network at two test points. The testing may comprise demodulation of a same data packet at the test points, decoding the data packet, performing spectral analysis of the signal, etc. Testing results may be correlated with one another, both visually and by using pre-defined test metrics comprising a weighted sum of demodulation and decoding parameters such as modulation extinction ratio and a codeword error.
    Type: Application
    Filed: May 20, 2016
    Publication date: January 19, 2017
    Inventors: Daniel K. CHAPPELL, Richard Earl JONES, JR., David W. JONES, Adam D. GRAY
  • Patent number: 9350986
    Abstract: A dual-port testing apparatus is provided for testing a cable network at two test points. The testing may comprise demodulation of a same data packet at the test points, decoding the data packet, performing spectral analysis of the signal, etc. Testing results may be correlated with one another, both visually and by using pre-defined test metrics comprising a weighted sum of demodulation and decoding parameters such as modulation extinction ratio and a codeword error.
    Type: Grant
    Filed: July 10, 2014
    Date of Patent: May 24, 2016
    Assignee: Viavi Solutions Inc.
    Inventors: Daniel K. Chappell, Richard Earl Jones, Jr., David W. Jones, Adam D. Gray
  • Publication number: 20150020129
    Abstract: A dual-port testing apparatus is provided for testing a cable network at two test points. The testing may comprise demodulation of a same data packet at the test points, decoding the data packet, performing spectral analysis of the signal, etc. Testing results may be correlated with one another, both visually and by using pre-defined test metrics comprising a weighted sum of demodulation and decoding parameters such as modulation extinction ratio and a codeword error.
    Type: Application
    Filed: July 10, 2014
    Publication date: January 15, 2015
    Inventors: Daniel K. Chappell, Richard Earl Jones, JR., David W. Jones, Adam D. Gray
  • Patent number: 8762088
    Abstract: Systems and methods for quantifying the suitability of a coax network segment to support MoCA communications, comprising: transmitting a test signal associated with MoCA communications through the segment's first end; receiving the test signal through the segment's second end; determining a response function; determining a channel degradation reference based on the highest power level of the response function and a predetermined reference; calculating subcarrier degradation for each MoCA subcarrier, in accordance with the difference between the channel degradation reference and the subcarrier response function; and quantifying the suitability of the segment to support MoCA communications from the first end to the second end in accordance with the subcarrier degradation of all subcarriers in the response function.
    Type: Grant
    Filed: January 30, 2012
    Date of Patent: June 24, 2014
    Assignee: JDS Uniphase Corporation
    Inventors: Gregory W. Massey, Daniel K. Chappell, Richard Earl Jones, Jr.
  • Patent number: 8558552
    Abstract: A method of characterizing a wiring network is implemented in a system which includes a test controller and at least two probes. On commands from the test controller, at least one of the probes changes its impedance between the nominal impedance of the wiring network and a mismatch impedance. Reflectometry measurements are performed before and after of switching the impedance of the second probe. At the first probe, an RF signal is generated and a reflected signal is measured. Then, the impedance of the second probe is changed, and again an RF signal is generated and a reflected signal is measured at the first probe. Additionally, a frequency response may be measured at the second probe. The results of the measurements are used for characterization of a transmission line between the first and second probes.
    Type: Grant
    Filed: September 24, 2010
    Date of Patent: October 15, 2013
    Assignee: JDS Uniphase Corporation
    Inventors: Daniel K. Chappell, Richard Earl Jones, Jr., Eddie B. Gaines
  • Publication number: 20130194936
    Abstract: Systems and methods for quantifying the suitability of a coax network segment to support MoCA communications, comprising: transmitting a test signal associated with MoCA communications through the segment's first end; receiving the test signal through the segment's second end; determining a response function; determining a channel degradation reference based on the highest power level of the response function and a predetermined reference; calculating subcarrier degradation for each MoCA subcarrier, in accordance with the difference between the channel degradation reference and the subcarrier response function; and quantifying the suitability of the segment to support MoCA communications from the first end to the second end in accordance with the subcarrier degradation of all subcarriers in the response function.
    Type: Application
    Filed: January 30, 2012
    Publication date: August 1, 2013
    Applicant: JDS Uniphase Corporation
    Inventors: Gregory W. MASSEY, Daniel K. CHAPPELL, Richard Earl JONES, JR.
  • Patent number: 8352842
    Abstract: A method for determining a contribution of burst noise to a bit error rate in a digital system for reception of an interleaved forward error correction-enabled digital symbol stream is described. The method is based on identifying errored symbols at a decoding stage, determining their positions in the interleaved stream, and performing a windowing operation such that the errored symbols located within the window in the interleaved stream are designated as burst errored symbols. A corresponding digital receiver and a digital transmission system are also disclosed.
    Type: Grant
    Filed: June 16, 2009
    Date of Patent: January 8, 2013
    Assignee: Acterna LLC
    Inventor: Richard Earl Jones, Jr.
  • Publication number: 20120074952
    Abstract: A method of characterizing a wiring network is implemented in a system which includes a test controller and at least two probes. On commands from the test controller, at least one of the probes changes its impedance between the nominal impedance of the wiring network and a mismatch impedance. Reflectometry measurements are performed before and after of switching the impedance of the second probe. At the first probe, an RF signal is generated and a reflected signal is measured. Then, the impedance of the second probe is changed, and again an RF signal is generated and a reflected signal is measured at the first probe. Additionally, a frequency response may be measured at the second probe.
    Type: Application
    Filed: September 24, 2010
    Publication date: March 29, 2012
    Inventors: Daniel K. CHAPPELL, Richard Earl JONES, JR., Eddie B. GAINES
  • Publication number: 20100309805
    Abstract: In order to measure the performance of a DOCSIS upstream channel as well as to locate impairments, a special test signal is transmitted in a time slot of the upstream channel by a test instrument positioned anywhere within the CATV plant. A second test instrument, located at the termination point of the upstream plant, then detects, recovers, and processes the test signal in order to complete the measurement. The typical methods used to detect and recover bursted signals within a DOCSIS upstream channel use precise timing information transmitted in a corresponding DOCSIS downstream channel. Unfortunately, the downstream channel and thus the precise timing information are not always available to the secondary test instrument. The present invention also describes an apparatus and method for detecting a bursted test signal without the use of the DOCSIS upstream channel timing.
    Type: Application
    Filed: June 3, 2010
    Publication date: December 9, 2010
    Inventors: Richard Earl JONES, JR., Ching-Chang Liao, Daniel K. Chappell
  • Publication number: 20090319838
    Abstract: A method for determining a contribution of burst noise to a bit error rate in a digital system for reception of an interleaved forward error correction-enabled digital symbol stream is described. The method is based on identifying errored symbols at a decoding stage, determining their positions in the interleaved stream, and performing a windowing operation such that the errored symbols located within the window in the interleaved stream are designated as burst errored symbols. A corresponding digital receiver and a digital transmission system are also disclosed.
    Type: Application
    Filed: June 16, 2009
    Publication date: December 24, 2009
    Applicant: Acterna LLC
    Inventor: Richard Earl JONES, JR.