Patents by Inventor Richard F. Bis

Richard F. Bis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6218055
    Abstract: A small, portable electrochemical power cell, having an output voltage of over 4 V, and preferably over 5 V, includes an anode, a cathode having a fluorine compound and an electrolyte having an organic sulfur-containing compound to maintain ionic conductivity between the anode and the cathode. A method of fabricating such an electrochemical power cell includes the step adding an electrolyte having an organic, sulfur-containing compound to maintain electrical conductivity between the anode and the cathode. An electrochemical power cell having a lithium anode, a CoF3 cathode, an electrolyte to maintain ionic conductivity between the anode and the cathode and a cobalt complexing material within the electrolyte to complex cobalt ions is described.
    Type: Grant
    Filed: July 29, 1999
    Date of Patent: April 17, 2001
    Assignee: Mine Safety Appliances Company
    Inventors: Pinakin M. Shah, Marvin L. Kronenberg, Richard F. Bis, Donald L. Warburton, Joseph J. Bytella, Dayal T. Meshri
  • Patent number: 6180284
    Abstract: A small, portable electrochemical power cell, having an output voltage of over 4 V, and preferably over 5 V, includes an anode, a cathode comprising a fluorine compound and an electrolyte to maintain ionic conductivity between the anode and the cathode. A method of fabricating such an electrochemical power cell includes the step of adding a fluorine compound to the cathode and/or to the electrolyte solvent.
    Type: Grant
    Filed: June 5, 1998
    Date of Patent: January 30, 2001
    Assignee: Mine Safety Appliances Company
    Inventors: Pinakin M. Shah, Marvin L. Kronenberg, Richard F. Bis, Donald L. Warburton, Joseph J. Bytella, Dayal T. Meshri
  • Patent number: 4371882
    Abstract: A controlled environment process for making diode arrays by depositing the sublimate of a semiconductor material through an aperture of a mask placed nearby a substrate and then subjecting part of the sublimate to ion implantation. The aperture causes diffraction of the sublimate vapor stream, while the proximity of the edges of the aperature to the substrate causes the central plateau of the deposited thin-film to have a rounded rim leading to sides that taper smoothly in thickness to the substrate. Ion implantation to a controlled depth creates an isolated planar junction. Surface layers of a gold electrode running onto the substrate from different surface areas of the thin-film provide for off-mesa bonding of electrical leads.
    Type: Grant
    Filed: July 20, 1978
    Date of Patent: February 1, 1983
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Hayden Morris, Richard F. Bis
  • Patent number: 4330932
    Abstract: A controlled environment process for making diode arrays by depositing the sublimate of a semiconductor material through an aperture of a mask placed nearby a substrate and then subjecting part of the sublimate to ion implantation. The aperture causes diffraction of the sublimate vapor stream while the proximity of the edges of the aperture to the substrate causes the central plateau of the deposited thin-film to have a rounded rim leading to sides that taper smoothly in thickness to the substrate. Ion implantation to a controlled depth creates an isolated planar junction. Surface layers of a gold electrode running onto the substrate from different surface areas of the thin-film provide for off-mesa bonding of electrical leads.
    Type: Grant
    Filed: May 14, 1980
    Date of Patent: May 25, 1982
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Hayden Morris, Richard F. Bis
  • Patent number: 3961998
    Abstract: A junction photodetector employing Pb.sub.1-x Sn.sub.x Te in narrow film strips grown epitaxially on an appropriate substrate. An appropriate metal overlaps the film to form a metal-semiconductor contact.
    Type: Grant
    Filed: April 9, 1975
    Date of Patent: June 8, 1976
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Kurt Peter Scharnhorst, Richard F. Bis, Jack R. Dixon, Bland B. Houston, Jr., Richard W. Brown, Harold R. Riedl