Abstract: A magnetic core device is provided having first and second magnetic core members. The first core member is generally E-shaped having first, second, and third surfaces. The first, second, and third surfaces have first, second, and third surface areas, respectively. The second magnetic core member is generally planar for joining with the first, second, and third surfaces of the first magnetic core member. The second core member is oversized relative to the first core member to allow for shifted and/or skewed alignment of the core members.

Abstract: A magnetic core device is provided having first and second magnetic core members. The first core member is generally E-shaped having first, second, and third surfaces. The first, second, and third surfaces have first, second, and third surface areas, respectively. The second magnetic core member is generally planar for joining with the first, second, and third surfaces of the first magnetic core member. The second core member is oversized relative to the first core member to allow for shifted and/or skewed alignment of the core members.

Abstract: An improved gate drive circuit powered by a DC source voltage, the drive circuit having an isolated output stage with a parallel-connected by-pass capacitor and a switched input capacitor circuit that maintains a charge on the by-pass capacitor for driving the gate of a controlled MOS transistor while isolating the by-pass capacitor from the source voltage. In a fully isolated embodiment of the improved gate drive circuit, a bank of controlled switches alternately couples the input capacitor to the source voltage and the by-pass capacitor, while in another embodiment, uni-directional isolation is achieved by replacing one or more of the controlled switches with diodes.

Abstract: An improved low-cost gate drive circuit drives the bridge transistors of a multiple power supply bridge circuit with a single logic level voltage. In general, the single logic level voltage is referenced to a first power supply and provides gate drive voltages for bridge transistors associated with a second power supply. The logic level voltage is bootstrapped to a first by-pass capacitor to provide a first gate drive voltage for a high-side transistor associated with the first power supply, and the charge on the first by-pass capacitor is consecutively bootstrapped to second and third by-pass capacitors to provide second and third gate drive voltages for bridge transistors associated with the second power supply.