Patents by Inventor Richard G. Barnich

Richard G. Barnich has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4974192
    Abstract: A microcomputer is adapted to act as a communications processor for a personal computer of the type having its address and data busses supplied to a female connector forming part of a system expansion slot. The communications processor is formed on a printed circuit card and includes at least two I/O ports, one connected to its edge connector for insertion into the slot connector of the personal computer, and the other formed on its rear edge so as to be accessible to external connectors. The communications processor has a power supply energized through a connector on its rear edge and a back-up battery power supply. The communication processor can receive communications from and transmit to remote sources while the personal computer is being used for other purposes. Receiver messages are stored in the RAM of the communications processor and are unloaded to the personal computer under control of its keyboard at the operator's convenience.
    Type: Grant
    Filed: August 4, 1989
    Date of Patent: November 27, 1990
    Assignee: Face Technologies, Inc.
    Inventors: William W. Face, Richard G. Barnich
  • Patent number: 4525601
    Abstract: A computer based telephone accounting system collects data on calls made from a key system or PBX and automatically generates accounting reports which include the costs of the calls. A minimum amount of memory is used in calculating the costs by grouping combinations of area codes and exchange numbers into geographic bands and precomputing the distance from a particular area code and exchange number to all the remaining combinations of area codes and exchange numbers in the other bands. The combination of area codes and exchange numbers are stored in an N.times.M memory matrix where N equals the area code numbers and M equals the exchange numbers. A plurality of memory stored, multi-bit data words defining an algorithm for computing the cost of a call to a particular band are individually selected using an address defined by the position of the bit in the memory matrix which corresponds to the particular area code/exchange number being called.
    Type: Grant
    Filed: December 13, 1983
    Date of Patent: June 25, 1985
    Inventors: Richard G. Barnich, Michael H. Ferguson, Charles K. McGregor
  • Patent number: 4470042
    Abstract: A system for simultaneously displaying graphics and alphanumeric data on a raster scan display screen is particularly suited for use with a computerized and numerical control system for controlling machine tools or the like. A first memory stores a multi-bit data word which includes first and second subgroups of data bits respectively corresponding to an alphanumeric character and several modifications of the data to be displayed. The first subgroup of data bits defines a character field on the screen which consists of lines and columns of pixels, and is delivered as an address to a character generator which produces an output representing an alphanumeric character. A second memory stores graphics data in the form of multi-bit words which correspond to groups of pixels on each line of the screen. The alphanumeric and graphics data, as well as the second subgroup of modification bits, are selectively gated to a decoder which outputs signals to a video generator according to a preselected priority scheme.
    Type: Grant
    Filed: March 6, 1981
    Date of Patent: September 4, 1984
    Assignee: Allen-Bradley Company
    Inventors: Richard G. Barnich, Thomas B. Braun, Lloyd R. Lawrence, Peter C. Schmitt
  • Patent number: 4249240
    Abstract: A computer system employs a CPU interconnected to a number of devices and terminals over a common bus. Each device has a different address assigned to it and a message from one device to another, over the bus, is prefixed with the receiving device's address. To simplify the hardware of input/output devices connected to the system all such devices have an abbreviated address and a prefix common to the class. A decoder detects when this prefix is transmitted on the address bus and sends a signal over a line that connects only to these devices. When the devices receive a signal on this line they examine the abbreviated portion of the address and are activated when coincidence is detected.
    Type: Grant
    Filed: March 2, 1979
    Date of Patent: February 3, 1981
    Assignee: Xycom, Inc.
    Inventor: Richard G. Barnich
  • Patent number: 4146782
    Abstract: A manually supported reader for a bar code which comprises a plurality of parallel bars of varying widths employs an optical detector which generates an electrical output signal which is a function of the code as the detector is moved. The detector comprises a light source and a light sensor, optically arranged to reflect light off of that part of the bar code with which it is in contact, thereby varying the output signal of the detector each time a boundary of one of the bars within the code is traversed. A decoding network receives the output signal from the detector and determines the time required to traverse each successive bar. A signal associated with the traversal of each bar is compared with an internally generated criterian. As a result of the comparison, the bar associated therewith is classified as to its width. Based on that classification, the criterian is recalculated for comparison with the signal associated with the next bar scanned.
    Type: Grant
    Filed: August 5, 1977
    Date of Patent: March 27, 1979
    Assignee: Process Computer Systems, Inc.
    Inventor: Richard G. Barnich
  • Patent number: 4109244
    Abstract: A CRT display system is connected to a central processing unit over a bus and includes a random access memory which is filled and modified under the control of the computer and contains a sequence of codes defining characters to be displayed on the screen in successive locations. An oscillator controlled divider chain increments an address counter and also provides vertical and horizontal synchronization and retrace signals. A character generator which receives a character code from a RAM location designated by the counter as well as timing signals from the divider chain controls intensity modulation of the CRT display. Multiplexers interposed at various points in the divider chain receive the output of several stages of the preceding divider and operate under control from the CPU to determine which output is provided to the next element in the chain, thereby controlling the character size and spacing on the screen.
    Type: Grant
    Filed: September 8, 1976
    Date of Patent: August 22, 1978
    Assignee: Process Computer Systems, Inc.
    Inventors: Richard G. Barnich, Timothy M. Hakeem
  • Patent number: 3975954
    Abstract: To evaluate the quality of a torquing operation wherein a tool engages a workpiece and exerts a rotational driving force on the workpiece until a predetermined maximum torque is attained between the workpiece and the tool, the time during that torquing operation in which the torque actually being exerted by a tool on the workpiece exceeds the maximum torque previously exerted by the tool on the workpiece during the torquing operation is recorded. This value is then compared with previously established minimum and maximum values at such time as to detect an improper torquing action. The apparatus for recording this time includes a sensor connected to the tool which generates the signal proportional to instantaneous torque being exerted. A peak detector follows this signal as it increases and stores a value equal to the maximum torque previously exerted by the tool on a workpiece during the torquing operation.
    Type: Grant
    Filed: November 25, 1974
    Date of Patent: August 24, 1976
    Assignee: Process Computer Systems, Inc.
    Inventor: Richard G. Barnich
  • Patent number: D246368
    Type: Grant
    Filed: July 19, 1976
    Date of Patent: November 15, 1977
    Assignee: Process Computer Systems, Inc.
    Inventors: Richard G. Barnich, Gary D. Johnson
  • Patent number: D247779
    Type: Grant
    Filed: August 9, 1976
    Date of Patent: April 25, 1978
    Assignee: Process Computer Systems, Inc.
    Inventors: Richard G. Barnich, Gary D. Johnson