Patents by Inventor Richard G. SCHMALBACH

Richard G. SCHMALBACH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9361172
    Abstract: Systems (100) and methods (300) for synchronizing operations of processors (102, 104). The methods involve: receiving by an electronic circuit (106) a first request (250) from a first processor for writing first data (262) to or reading first data from a first address (260) in a first data store (122), and subsequently a second request (252) from a second processor for writing second data (266) to or reading second data from a second address (264) in a second data store (124); comparing values of the first and second addresses to each other and values of the first and second data to each other; and concurrently communicating an asynchronous ready signal (254) from the electronic circuit to the processors when the values of the addresses and data respectively match each other. The asynchronous ready signal causes operations of the processors to be synchronized in time with each other.
    Type: Grant
    Filed: July 2, 2014
    Date of Patent: June 7, 2016
    Assignee: Harris Corporation
    Inventors: Charles A. Linn, Jeffrey R. Beane, George P. Paskalakis, Richard G. Schmalbach, Christopher J. Tilley
  • Publication number: 20160004581
    Abstract: Systems (100) and methods (300) for synchronizing operations of processors (102, 104). The methods involve: receiving by an electronic circuit (106) a first request (250) from a first processor for writing first data (262) to or reading first data from a first address (260) in a first data store (122), and subsequently a second request (252) from a second processor for writing second data (266) to or reading second data from a second address (264) in a second data store (124); comparing values of the first and second addresses to each other and values of the first and second data to each other; and concurrently communicating an asynchronous ready signal (254) from the electronic circuit to the processors when the values of the addresses and data respectively match each other. The asynchronous ready signal causes operations of the processors to be synchronized in time with each other.
    Type: Application
    Filed: July 2, 2014
    Publication date: January 7, 2016
    Applicant: HARRIS CORPORATION
    Inventors: Charles A. LINN, Jeffrey R. BEANE, George P. PASKALAKIS, Richard G. SCHMALBACH, Christopher J. TILLEY