Patents by Inventor Richard Gerard Burda

Richard Gerard Burda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8165704
    Abstract: A method and computer program product for scheduling product lots through operations of a manufacturing line. The method including: selecting a set of sequential operations required to manufacture the lots; partitioning the product lots into designated lots and non-designated lots; and generating a release schedule for each of the non-designated lots into one or more operations of the set of sequential operations; generating a release schedule for each of the designated lots into each operation of set of sequential operations such that for each designated lot a total amount of time measured from completion of a first operation of the set of sequential operations through start of a last operation of the set of sequential operations does not exceed a target amount of time for the designated lots.
    Type: Grant
    Filed: January 7, 2009
    Date of Patent: April 24, 2012
    Assignee: International Business Machines Corporation
    Inventors: Richard Gerard Burda, Alfred Degbotse, Brian Trevor Denton, Kenneth Jeffrey Fordyce, Robert John Milne
  • Publication number: 20090138114
    Abstract: A method and computer program product for scheduling product lots through operations of a manufacturing line. The method including: selecting a set of sequential operations required to manufacture the lots; partitioning the product lots into designated lots and non-designated lots; and generating a release schedule for each of the non-designated lots into one or more operations of the set of sequential operations; generating a release schedule for each of the designated lots into each operation of set of sequential operations such that for each designated lot a total amount of time measured from completion of a first operation of the set of sequential operations through start of a last operation of the set of sequential operations does not exceed a target amount of time for the designated lots.
    Type: Application
    Filed: January 7, 2009
    Publication date: May 28, 2009
    Inventors: Richard Gerard Burda, Alfred Degbotse, Brian Trevor Denton, Kenneth Jeffrey Fordyce, Robert John Milne
  • Patent number: 7477958
    Abstract: A method and computer program product for scheduling product lots through operations of a manufacturing line. The method including: selecting a sequential subset of a set of sequential operations required to manufacture the lots; partitioning the product lots into designated lots and non-designated lots; and generating a release schedule for each of the non-designated lots into one or more operations of the sequential subset of the set of sequential operations; generating a release schedule for each of the designated lots into each operation of the sequential subset of the set of sequential operations such that for each designated lot a total amount of time measured from completion of a first operation of the sequential subset of the set of sequential operations through start of a last operation of the sequential subset of the set of sequential operations does not exceed a target amount of time for the designated lots.
    Type: Grant
    Filed: May 11, 2005
    Date of Patent: January 13, 2009
    Assignee: International Business Machines Corporation
    Inventors: Richard Gerard Burda, Alfred Degbotse, Brian Trevor Denton, Kenneth Jeffrey Fordyce, Robert John Milne
  • Patent number: 7426420
    Abstract: A system for dispatching a plurality of semiconductor lots among a plurality of tools is provided. The system includes a dispatch server manager and a dispatch integrator and display device. The dispatch integrator and display device conveys a dispatch request to the manager and receives a dispatch list from the manager. The manager queries for a processing status of the plurality of semiconductor lots and displays a dispatch list in response to the processing status. The dispatch list includes an associated reason and/or code related to the processing status.
    Type: Grant
    Filed: January 31, 2006
    Date of Patent: September 16, 2008
    Assignee: International Business Machines Corporation
    Inventors: Eric Ted Dickstein, Alan Dziedzic, Richard Gerard Burda