Abstract: A high-current VMOS transistor having a source connected to a floating reference voltage terminal is switched between conducting and non-conducting states by a low power source including complementary-symmetry FET's. When the VMOS is back biased a low impedance path having a constant predetermined voltage exits between the VMOS source and drain via one of the bipolar transistors. This prevents false triggering of the VMOS if the reference voltage drops below a nominal value. A diode polarized to pass current oppositely from the source drain path and in shunt with the source drain path prevents the VMOS from conducting if the reference voltage rises above the nominal value. The bipolar transistors are shunted by a zener diode to maintain a predetermined voltage across the bipolar transistors, i.e. between the reference voltage terminal and a terminal connected through a load resistor to a power supply terminal.

Abstract: A voltage snubber connected to the output terminals of a transistorized, push-pull inverter for supplying bidirectional current to an inductive load comprises a snubber capacitor and relatively large valued resistor connected in series with each other across the output terminals of the inverter and a switching circuit for bypassing the resistor during turn-off periods of the inverter transistors. The value of the snubber resistor is high enough to provide slow recharging of the snubber capacitor during turn-on periods of the inverter transistors to reduce transistor power dissipation. When the resistor is bypassed by the switching circuit during the inverter transistor turn-off periods, the snubber is gated on to suppress high voltage surges generated by the inductive load. The snubber switching circuit is responsive to current sensors or logic commands connected in circuit with the inverter to detect turn-off transistors of the inverter transistors.

Abstract: Orderly control of power applied by a photovoltaic solar panel d.c. source to a load is attained despite varying long and short term solar conditions by coupling power from the panel to an inverter in response to the panel voltage exceeding a predetermined level and preventing coupling of power from the panel to the inverter in response to the panel voltage being less than a predetermined level. The switching frequency of the inverter is controlled in response to the panel voltage so that approximately maximum power which the panel is capable of generating is supplied to the inverter for the incident solar energy on the panel at a given temperature. Power is supplied to the inverter by a series switch between the panel and inverter. The switch is activated into a conducting state in response to the panel voltage exceeding a predetermined value.

Abstract: A relatively high power switching device is provided via the combination on a common substrate of a VMOS transistor having a gate electrode for receiving a control signal, a drain electrode, and a source electrode, individually connected to the collector and base electrodes of a bipolar transistor, respectively, the collector-emitter current path of the latter being the main current carrying path of the switching device.

Abstract: A relatively high power switching device and circuit is provided via the combination discretely or on a common substrate of a VMOS transistor having a gate electrode for receiving a control signal, a drain electrode, and a source electrode, individually connected to the collector and base electrodes of a bipolar transistor, respectively, the collector-emitter current path of the latter being the main current carrying path of the switching device.

Abstract: A filter for a polyphase rectifier includes first and second substantially identical sections each including a capacitor connected in series with a parallel circuit of a diode and a resistor, the capacitors of each section being connected at one end in common to a neutral or reference voltage terminal of the rectifier, the other ends of the first and second sections being connected to positive and negative output terminals, respectively, of the rectifier, the diode of the first section being polarized for passing current from the positive output terminal to its respective capacitor, the diode of the second section being polarized for passing current from the neutral terminal to its respective capacitor, the values of the resistors and capacitors being chosen for preventing the flow of ripple current through the first and second sections and substantially preventing discharging of said capacitors, for ensuring that the rectifier supply most of the load current, and for substantially eliminating peak current de

Abstract: A relatively high-power switching device and circuit includes a first VMOS transistor which is turned on for supplying via its channel a first current to the base electrode of a bipolar transistor, for turning on the latter into at least an unsaturated conduction state, thereafter a second VMOS transistor is turned on for supplying a second current concurrently with the first current to the base electrode of the bipolar transistor, causing the latter to go into or close to saturation as possible, depending upon the characterstics of the load, for minimizing the power dissipation thereof during a major period of its conductive state. The second VMOS transistor has its channel connected between the base and emitter electrodes of the bipolar transistor, whereby when the former is conductive, in addition to supplying the second current, it also provides negative feedback between the collector and base electrodes of the bipolar transistor, thereby enhancing the transient capability of the bipolar transistor.

Abstract: A circuit for suppressing surge or transient currents between a DC power supply and a capacitive load includes a suppression impedance of relatively high impedance connected in series with the load between the DC supply and load, a transistorized control circuit for sensing the voltage across the load, and producing a firing signal when the level of voltage exceeds a predetermined level, and an SCR having its main current path connected in parallel with the suppression impedance, and its gate electrode receptive of the firing signal for turning on the SCR to by-pass the suppression impedance subsequent to application of power to the load.

Abstract: A converter includes a full-wave bridge network across which operating voltages of +E and -E volts are applied, diagonal legs of the bridge each including two semi-conductor switches connected in series between individual operating voltage and output terminals, two diodes polarized in one direction being connected for conducting current from a point of reference potential to the centralmost switches of the two upper legs, respectively, and another two diodes like polarized in another direction being connected for conducting current from the centralmost switches of the two lower legs, respectively, to the point of reference potential. Each diode and its associated switch form a unidirectional gated current path and the vertically opposing centralmost switch and diode pairs of the upper and lower legs form a bidirectional gated current path.

Abstract: A rotatable and vertically adjustable chair base is disclosed comprising a floor engaging stand, an upstanding tubular post mounted on the stand, a threaded member received by the tubular post and a smooth spindle slidably and rotatably received by the upstanding tubular post. Internal threads are provided in the upstanding tubular post with a split sheet metal sleeve carrying stamped metal threads. The stamped metal threads of the sheet metal sleeve are engaged by a plastic threaded member which takes advantage of the relatively low coefficient of friction between plastic and metal. The spindle rides atop the threaded member, the vertical position of the spindle being determined by the position of the threaded member. Vertical adjustment of the spindle and the chair mounted atop the spindle is achieved with detent means for alternately engaging and disengaging the threaded member. When the chair is unoccupied, the spindle engages the threaded member and is vertically adjustable by rotation of the chair.

Abstract: The output transistor of a switching circuit is driven into saturation for obtaining fast turnon thereof, and maintained in saturation during a substantial portion of its period of operation, for obtaining minimum power dissipation thereof relative to its unsaturated state. A short time before turning off the output transistor, a diode is connected across its base and collector electrodes, for diverting some of the base current from the base electrode into the collector electrode thereof, thereby causing the transistor to come out of saturation, reducing the accumulated charge in the base region thereof, permitting faster turnoff of the transistor relative to its saturated state.

Abstract: A floating transistorized switching circuit comprises an optical coupler for electrically isolating a source of control signals from the switching circuit; a floating DC voltage supply, electrically isolated from the AC power line, for providing positive and negative logic level operating voltages, referenced to whatever voltage appears at the output terminal of the switching circuit; an output stage including first and second NPN switching transistors connected in a Darlington configuration; and a logic network responsive to the output signal from the optical coupler going on for turning on the Darlington output stage, and to this output signal going off for turning off the Darlington output stage.

Abstract: A method and apparatus for producing a plurality of pulse width modulated control signals, the combination of which are pulsed representations of the pattern of a reference waveform, comprises a sine wave generating network for producing the reference sine wave, a triangular waveform generating network for producing a triangular wave, a plurality of level shifting circuits for level shifting the triangular wave to produce a plurality of triangular waves each at a different level and having a different range of amplitudes, and a plurality of comparators each for comparing an individual one of the plurality of level shifted triangular waves with each half-cycle of the reference sine wave, for producing the plurality of control signals. The control signals may be decoded by decoding networks, the decoded control signals being applied for operating a waveform synthesizer or inverter stage to produce a multitiered steplike notched waveform equivalent of the reference waveform.

Abstract: First through fourth NPN switching transistors having bases receptive of first through fourth control signals, respectively, are connected in cascode between a first terminal, for receiving an operating voltage +E.sub.1, and a second terminal for receiving a source of reference potential. The common connection between the second and third transistors is connected to an output terminal. A first diode is connected between a third terminal for receiving a clamping voltage +E.sub.2 and the common connection between the uppermost first and second transistors, the diode being polarized for clamping this common connection from not going lower than +E.sub.2 volts. A second diode is connected between the third terminal and the common connection between the lowermost third and fourth transistors, this second diode being polarized for clamping its associated common connection to a maximum voltage of +E.sub.2 volts. The difference between the operating and clamping voltages (E.sub.1 -E.sub.

Abstract: Chopped current is supplied to an inductive load from a DC source that is switched by a pair of transistors having stacked emitter-collector paths between terminals of the source. Bases of the transistors are driven so that current can be supplied to the load from the source through the emitter-collector path of a first of the transistors during a first interval while the emitter-collector path of a second of the transistors is cut off. Current can flow from the load through the emitter-collector path of the second transistor during a second interval while the emitter-collector path of the first transistor is cut off. A diode bridge circuit connected between the emitter-collector paths and to the load, as well as to a bias circuit for one of the transistors, prevents current flow through the emitter-collector path of the first transistors while the second transistor is conducting regardless of the tendency of the base drive for the transistors to render the transistors simultaneously into a conducting state.

Abstract: At the initiation of each successive waveform of a train of positive polarity stepped waveforms, a first single-pole-single-throw (SPST) switching circuit is operated for applying this train of waveforms across a fullwave SCR bridge mixer network having individual diodes connected in inverse parallel across each SCR. For alternating ones of the train of waveforms, a different diagonal pair of SCR's of the mixer are turned on at the initiation of an associative waveform, for supplying alternating current to and a dual polarity AC voltage across a load. At the end of the period of each waveform, the first switching circuit is operated for removing the train of waveforms from the mixer, and thereafter a second switching circuit is operated for applying a negative voltage across the mixer network, causing the diodes to become forward biased for reverse biasing their respective SCR's, thereby turning off the conducting ones of the SCR's via natural commutation.

Abstract: An inverter circuit includes a DC voltage supply having a plurality of voltage taps coupled via (1) a first plurality of diodes for unidirectional current flow therefrom to successive common connections between the upper half of a plurality of first transistors connected in cascade across the voltage supply, (2) a second plurality of diodes for unidirectional current flow therefrom to successive common connections between the upper half of a plurality of capacitors, of like number to the first transistors, connected in series and across the DC voltage supply via a pair of diodes providing unidirectional current between the voltage supply and capacitors, (3) a third plurality of diodes for unidirectional current flow thereto from successive common connections between the lower half of the plurality of first transistors, (4) a fourth plurality of diodes for unidirectional current flow thereto from the successive common connections between the lower half of the plurality of capacitors; and a plurality of second

Abstract: A method and apparatus for producing control signals for operating an inverter circuit to convert a DC voltage into multitiered steplike notched N phase AC output signals (N=some positive integer number other than zero). A plurality of N reference sine waves are generated 90.degree. out of phase with one another for N=2, and for N greater than 2, successive ones of said N reference sine waves are generated 360.degree./N out of phase with each other. First through third triangular sampling or timing waveforms are generated and concurrently compared with the uppermost, central and lowermost portions, respectively, of each individual one of said N reference sine waves, for producing N sets of first, second and third pulse width modulated pulse trains, respectively. Decoding logic networks are receptive of these N sets of first through third pulse trains, for decoding these pulse trains into the necessary control signals for operating a particular inverter circuit.

Abstract: The collector-emitter voltages (V.sub.ce) of each one of the two transistors of a single-pole-double-throw transistorized switch are independently sensed by a sensing circuit for producing a fault signal, whenever the V.sub.ce of each transistor concurrently approaches or exceeds the magnitudes of first and second DC reference voltages, respectively, by predetermined differentials. Control logic is responsive to the fault signal for removing the base drive from the conducting one of the transistors. An RC network is included in the sensing circuit, for delaying the production of the fault signal, both to avoid false triggering of the control logic, and to provide time for sequentially turning off one transistor and turning on the other transistor.

Abstract: A circuit for inverting a DC voltage to an AC voltage having a predetermined waveform, includes first and second level shifting stages for providing selectively at their respective output terminals a voltage having the level of the DC voltage, or about twice the level of the DC voltage. A first pair of transistorized switches are included for concurrently and selectively connecting the output terminal of one of the level shifters to one end of a load, and ground to the other end, respectively, for driving current through the load in a particular direction and obtaining a desired level and polarity of voltage thereacross, or the switches are operated to ground both ends of the load. In generating a stepwise approximation of a symmetrical AC waveform, such as a sinewave, one level shifting stage is charging from the DC voltage supply while the other level shifting stage is discharging into the load, during each half-cycle of the AC voltage.