Abstract: Examples disclosed herein relate to a fault-tolerant dot product engine. The fault-tolerant dot product engine has a crossbar array having a number l of row lines and a number n of column lines intersecting the row lines to form l×n memory locations, with each memory location having a programmable memristive element and defining a matrix value. A number l of digital-to-analog converters are coupled to the row lines of the crossbar array to receive an input signal and a number n of analog-to-digital converters are coupled to the column lines of the crossbar array to generate an output signal. The output signal is a dot product of the input signal and the matrix values in the crossbar array, wherein a number m<n of the n column lines in the crossbar array are programmed with matrix values used to detect errors in the output signal.

Abstract: Examples disclosed herein relate to a fault-tolerant dot product engine. The fault-tolerant dot product engine has a crossbar array having a number l of row lines and a number n of column lines intersecting the row lines to form l×n memory locations, with each memory location having a programmable memristive element and defining a matrix value. A number l of digital-to-analog converters are coupled to the row lines of the crossbar array to receive an input signal and a number n of analog-to-digital converters are coupled to the column lines of the crossbar array to generate an output signal. The output signal is a dot product of the input signal and the matrix values in the crossbar array, wherein a number m<n of the n column lines in the crossbar array are programmed with matrix values used to detect errors in the output signal.

Abstract: In example implementations, an integrated characterization vehicle is provided. The integrated characterization vehicle includes a memristor, a configuration cache and an analog measurement tile. The memristor has a driving unit to limit an amount of current that is driven through the memristor during testing. The configuration cache provides test parameters to control the testing of the memristor. The analog measurement tile provides a voltage to the memristor in accordance with the test parameters and to record a response of the memristor.

Abstract: Examples disclosed herein relate to a fault-tolerant dot product engine. The fault-tolerant dot product engine has a crossbar array having a number l of row lines and a number n of column lines intersecting the row lines to form l×n memory locations, with each memory location having a programmable memristive element and defining a matrix value. A number l of digital-to-analog converters are coupled to the row lines of the crossbar array to receive an input signal and a number n of analog-to-digital converters are coupled to the column lines of the crossbar array to generate an output signal. The output signal is a dot product of the input signal and the matrix values in the crossbar array, wherein a number m<n of the n column lines in the crossbar array are programmed with matrix values used to detect errors in the output signal.

Abstract: In example implementations, an integrated characterization vehicle is provided. The integrated characterization vehicle includes a memristor, a configuration cache and an analog measurement tile. The memristor has a driving unit to limit an amount of current that is driven through the memristor during testing. The configuration cache provides test parameters to control the testing of the memristor. The analog measurement tile provides a voltage to the memristor in accordance with the test parameters and to record a response of the memristor.

Abstract: Examples disclosed herein relate to a fault-tolerant dot product engine. The fault-tolerant dot product engine has a. crossbar array having a number l of row lines and a number n of column lines intersecting the row lines to form l×n memory locations, with each memory location having a programmable memristive element and defining a matrix value. A number l of digital-to-analog converters are coupled to the row lines of the crossbar array to receive an input signal and a number n of analog-to-digital converters are coupled to the column lines of the crossbar array to generate an output signal.

Abstract: A resistive memory device includes a bottom electrode and a top electrode sandwiching a switching layer. The device also includes a field enhancement (FE) feature that extends from the bottom electrode either into the switching layer or is covered by switching layer and that is to enhance an electric field generated by the two electrodes to thereby confine a switching area of the device at the FE feature. The device further includes a planar interlayer dielectric surrounding the device, for supporting the top electrode. A method of making a resistive memory device, employing in-situ vacuum deposition of all layers, is also provided.

Abstract: A resistive memory device includes a conductor and a resistive memory stack in contact with the conductor. The resistive memory stack includes a multi-component electrode and a switching region. The multi-component electrode includes a base electrode having a surface, and an inert material electrode on the base electrode surface in a form of i) a thin layer, or ii) discontinuous nano-islands. A switching region is in contact with the conductor and with the inert material electrode when the inert material electrode is in the form of the thin layer; or the switching region is in contact with the conductor, with the inert material electrode, and with an oxidized portion of the base electrode when the inert material electrode is in the form of the discontinuous nano-islands.

Abstract: A non-volatile memory device with multiple latency tiers includes at least two crossbar memory arrays, each crossbar memory array comprising a number of memory cells, each memory cell connected to a word line and a bit line at a cross point. The crossbar memory arrays each have a different latency. The crossbar memory arrays are formed on a single die.

Abstract: A method of forming a multi-layered selector of a memory cell is described. In the method, a memory element of the memory cell is formed. The memory element stores information. A multi-layered selector of the memory cell is formed by alternating deposition of at least a dielectric layer and a first diffusion layer. The first diffusion layer includes fast diffusive ions. The multi-layered selector is coupled to the memory element in a memory cell.

Abstract: A resistive memory device includes a conductor and a resistive memory stack in contact with the conductor. The resistive memory stack includes a multi-component electrode and a switching region. The multi-component electrode includes a base electrode having a surface, and an inert material electrode on the base electrode surface in a form of i) a thin layer, or ii) discontinuous nano-islands. A switching region is in contact with the conductor and with the inert material electrode when the inert material electrode is in the form of the thin layer; or the switching region is in contact with the conductor, with the inert material electrode, and with an oxidized portion of the base electrode when the inert material electrode is in the form of the discontinuous nano-islands.

Abstract: A non-volatile memory device with multiple latency tiers includes at least two crossbar memory arrays, each crossbar memory array comprising a number of memory cells, each memory cell connected to a word line and a bit line at a cross point. The crossbar memory arrays each have a different latency. The crossbar memory arrays are formed on a single die.

Abstract: A reflective color display has at least a color pixel disposed to receive ambient light for front lighting and has a light source optically coupled to the color pixel to provide back light for backlighting. The color pixel has a first sub-pixel and a second sub-pixel. The first sub-pixel has a first luminescent layer with a luminescent material for converting a portion of the ambient light spectrum into light of a first color. An unpatterned mirror is disposed under the luminescent layer of the first sub-pixel and extends through the first and second sub-pixels. The unpatterned mirror reflects at least light of the first color while transmitting the back light to the first luminescent layer for conversion by the first luminescent material into light of the first color.

Abstract: A resistive memory device includes a bottom electrode and a top electrode sandwiching a switching layer. The device also includes a field enhancement (FE) feature that extends from the bottom electrode either into the switching layer or is covered by switching layer and that is to enhance an electric field generated by the two electrodes to thereby confine a switching area of the device at the FE feature. The device further includes a planar interlayer dielectric surrounding the device, for supporting the top electrode. A method of making a resistive memory device, employing in-situ vacuum deposition of all layers, is also provided.

Abstract: A display includes at least two stacked waveguides (110) and (120). A first waveguide (110) contains first luminophores that fluoresce to produce light of a first color. A second waveguide (120) overlying the first waveguide and contains second luminophores that fluoresce to produce light of a second color. A light collection structure (180) transmits light from a surrounding environment transversely through the first and second waveguides (110, 120) and optical vias (172, 174) provide optical paths out of the display for light respectively from the first optical waveguide (110) and the second optical waveguide (120).

Abstract: A transflective display pixel includes a sub-pixel with a light-recycling modulation layer, a luminescent layer, and a selective reflector layer and a backlight source to provide backlight to the sub-pixel. The light-recycling modulation layer is to reflect light from the luminescent layer having a first polarization state, and the selective reflector layer is to reflect light from the luminescent layer in a first waveband. The selective reflector layer is to transmit the backlight to the luminescent layer, and the luminescent layer converts light from the light-recycling modulation layer and the backlight into the first waveband.

Abstract: A memristor structure has two electrodes sandwiching an insulating region, and includes a nanoparticle providing a conducting path between the two electrodes, wherein either the insulating region comprises an inorganic material and nanoparticle comprises a solid nanoparticle or a core/shell nanoparticle or the insulating region comprises an inorganic or organic material and the nanoparticle comprises a core/shell nanoparticle.

Abstract: A display element comprises a cell containing a fluid including a plurality of wells at the bottom of the cell. A luminescent material is within the cell for modulating light incident from the top of the cell and for returning luminescent light; and a dispersion of particles is contained within the fluid. The dispersion of particles is movable between a first state in which the particles are substantially contained within the plurality of wells and a second state in which the particles are distributed between the top and bottom of the cell, to control the intensity of luminescent light returned by the display element.

Abstract: A luminescent layer includes a series of down-converting luminophores dispersed in a matrix to collect ambient light energy over a range of wavelengths longer than a desired color band and a set of up-converting luminophores dispersed in the matrix. The series of down-converting luminophores transfer the ambient light energy to the set of up-converting luminophores, and the set of up-converting luminophores emits at least a portion of the ambient light energy in the desired color band.

Abstract: A reflective color display has at least a color pixel disposed to receive ambient light for front lighting and has a light source optically coupled to the color pixel to provide back light for backlighting. The color pixel has a first sub-pixel and a second sub-pixel. The first sub-pixel has a first luminescent layer with a luminescent material for converting a portion of the ambient light spectrum into light of a first color. An unpatterned mirror is disposed under the luminescent layer of the first sub-pixel and extends through the first and second sub-pixels. The unpatterned mirror reflects at least light of the first color while transmitting the back light to the first luminescent layer for conversion by the first luminescent material into light of the first color.