Abstract: In a wireless telecommunications system, data processing delays associated with digital channelization and de-channelization may be reduced through the use of a technique that involves processing data blocks in conjunction with the transformation of the data blocks by a large, Fast Fourier Transform (FFT) algorithm, and makes use of multiple transmission and reception branches. In accordance with this technique, the processing delays associated with the FFT algorithm are minimized, but not to the detriment of other important channelizer/de-channelizer design characteristics, such as power consumption, die area and computational complexity.

Abstract: A composite amplifier comprises several Chireix pairs (PAII, PAI2; PA21, PA22) of power amplifiers connected to a common load. Means (21) are provided for driving each Chireix pair by drive signals having amplitude dependent phase over at least a part of the dynamic range of the composite amplifier . These parts are preferably different for different pairs.

Abstract: A composite amplifier includes a main power amplifier (10) and an auxiliary power amplifier (12), which are connected to a load (14) over a Doherty output network (16). A non-linear function (18) and a cross-coupling filter (22) emulate the non-linear behavior of the output current of the auxiliary power amplifier (12) and the resulting emulating signal is subtracted from the input signal to said main amplifier (10).

Abstract: The invention relates to a composite amplifier (500) based on a main amplifier (510) and an auxiliary amplifier (520), and compensation for non-linear amplifier behavior by means of respective non-linear models (570, 575) of parasitic. In order to provide proper excitation of the non-linear models, a filter network (560) based on a linear model of the output network of the composite amplifier is provided. The linear filter network (550) basically determines ideal output node voltages, which are used as input to the respective non-linear models for generating appropriate compensation signals. The compensation signals are finally merged into the input signals of the respective sub-amplifiers (510, 520), thus effectively compensating for the effects of the non-linear parasitics.

Abstract: A composite amplifier includes a first and a second power amplifier (16, 18) connected to a Chireix output network (20). Means (10, 22) provide equal first and linear drive signal components that depends linearly on the amplitude A(t) of an amplitude modulated input signal. Further means (10, 24)provide first and second nonlinear drive signal components that have the same magnitude but opposite signs and depend non-linearly as {square root}1-A(t) on the amplitude A(t) and are in quadrature to the first and second linear drive signal components. Means (26, 28, 30, 32) individually adjust amplitudes and phases of the drive signal components to lower drive power consumption.

Abstract: A system, method, and receiver for receiving radio signals modulated according to different radio communication standards. Radio signals are received and downconverted to an intermediate frequency (IF) signal. An A/D-converter samples the IF signal at a sampling rate and digitizes the sampled signal into a digital signal. A channelizer filters out at least two modulated channels from the digital signal. A first ago channel is modulated according to a Time Division Multiple Access (TDMA) standard, and a second channel is modulated according to a Code Division Multiple Access (CDMA) standard. A first demodulating unit demodulates the TDMA channel, and a second demodulating unit demodulates the CDMA channel. Each of the demodulating units detects and, when needed, resamples each of the modulated channels individually, and delivers a corresponding demodulated channel. A Frequency Division Multiple Access (FDMA) channel may also be received and processed.

Abstract: A composite amplifier includes a main power amplifier (10) and an auxiliary power amplifier (12), which are connected to a load (14) over a Doherty output network (16). Filters (26, 28) are provided for pre-filtering the amplifier input signals in such a way that the signals meeting at the output of the main amplifier have essentially the same frequency dependence.

Abstract: The invention relates to a composite amplifier (500) based on a main amplifier (510) and an auxiliary amplifier (520), and compensation for non-linear amplifier behavior by means of respective non-linear models (570, 575) of parasitic. In order to provide proper excitation of the non-linear models. a filter network (560) based on a linear model of the output network of the composite amplifier is provided. The linear filter network (550) basically determines ideal output node voltages, which are used as input to the respective non-linear models for generating appropriate compensation signals. The compensation signals are finally merged into the input signals of the respective sub-amplifiers (510, 520), thus effectively compensating for the effects of the non-linear parasitics.

Abstract: The invention relates to a power amplifier comprising a level-discretization modulator (210) and a mixing and amplifying stage (225), in combination with a properly designed negative feedback path. The feedback path forms an error compensation loop together with a properly selected forward path. The forward path includes at least the mixing and amplifying stage (225), which provides frequency up-conversion to the radio frequency band and switch-based amplification. The negative feedback path includes a down-conversion mixer (280) for down-conversion to the initial frequency band, and compensates for distortion caused by components of the forward path. The negative feedback action will generally reduce both distortion caused by non-linear steady state impedance of the switches as well as distortion caused by non-linear steady state impedance of the switches as well as distortion resulting from switching glitches.

Abstract: A composite amplifier includes a main power amplifier (10) and an auxiliary power amplifier (12), which are connected to a load (14) over a Doherty output network (16). Filters (26, 28) are provided for pre-filtering the amplifier input signals in such a way that the signals meeting at the output of the main amplifier have essentially the same frequency dependence.

Abstract: A composite amplifier includes a main power amplifier (10) and an auxiliary power amplifier (12), which are connected to a load (26) over a Doherty output network. An attenuator (34) is provided for activating the auxiliary power amplifier (12) before the main amplifier (10) is saturated. Preferably the input drive voltage to the auxiliary power amplifier (12) is increased along a smooth curve as the input signal amplitude to the composite amplifier increases.

Abstract: A digital channelizer/de-channelizer architecture that, with a minimum amount of hardware, is capable of dynamically adapting to changing system requirements. Preferably, the digital channelizer/de-channelizer, which is applied with a modified fast convolution algorithm, includes a plurality of dedicated, optimized, pipeline modules that may be dynamically adjusted for allocating and handling different bandwidths, a flexible number of channels, and simultaneous multiple standards.

Abstract: A composite amplifier includes a main power amplifier (10) and an auxiliary power amplifier (12), which are connected to a load (14) over a Doherty output network (16). A nonlinear function (18) and a cross-coupling filter (22) emulate the non-linear behavior of the output current of the auxiliary power amplifier (12) and the resulting emulating signal is subtracted from the input signal to said main amplifier (10).

Abstract: A multistage Doherty amplifier is provided with separate drive amplifiers (DR4-DR5) for individual power amplifier (PA4-PA5) and/or separate drive amplifiers (DR) for groups of power amplifiers (PA1-PA3). This makes it possible to make significant improvements in efficiency and linearity by optimizing the drive for the different power amplifiers and using only a minimum of drive power.

Abstract: A composite amplifier includes a main power amplifier (10) and an auxiliary power amplifier (12), which are connected to a load (26) over a Doherty output network. An attenuator (34) is provided for activating the auxiliary power amplifier (12) before the main amplifier (10) is saturated. Preferably the input drive voltage to the auxiliary power amplifier (12) is increased along a smooth curve as the input signal amplitude to the composite amplifier increases.

Abstract: An A/D converter system includes a first A/D converter with calibration circuitry. Also included in the system is an auxiliary A/D converter having a lower performance level than the first A/D converter. Circuitry is provided for temporarily switching an A/D conversion from the first A/D converter to the auxiliary A/D converter during short time intervals used for calibration of the first A/D converter. The rate at which the A/D conversion is switched is lower than the sampling rate of the first A/D converter.

Abstract: A background calibrated A/D converter includes a random time interval generator that initiates background calibration at randomly selected time instants to increase the spurious-free dynamic range of the A/D converter.

Abstract: An arbitrary sample rate conversion apparatus is described. This apparatus includes a buffer for forming blocks of input samples having a first sample rate. For each block of input samples a subfilter is selected from a polyphase filter. Each block of input samples is convolved with the corresponding selected subfilter for producing blocks of output samples having a second sample rate.

Abstract: The present invention increases the flexibility of the modified fast convolution algorithm. In a first exemplary embodiment of the present invention, a block compensator is inserted into the channelizer/de-channelizer processing chain for multiplying data in the processing chain with compensation constants. The block compensator corrects the phase continuity problem associated with the modified fast convolution algorithm to thereby allow unrestricted filter placement. In a second exemplary embodiment, the phase continuity problem is corrected by combining a frequency translation in the frequency domain with a compensatory frequency translation in the time domain. Both techniques increase the flexibility of the modified fast convolution algorithm whilst only marginally increasing computational requirements.

Abstract: The present invention relates generally to receivers in DS-CDMA receivers, and more particularly to the need for providing a pulse-matched filter to eliminate interchip interference. A CDMA RAKE receiver is used. Instead of applying a pulse-matched filter to the input signal as in state of the art systems, a one-bit pulse-matched filter is applied to the spreading sequence, preferably a pseudonoise (PN) sequence, which interpolates up to the required oversampling ratio. Since the filter has a one-bit input, the multipliers can be replaced by adders which consume less power. Also, the number of adders does not increase with the oversampling ratio as do the number of multipliers in the prior art.