Abstract: A controller circuit for a PV sub-module includes a power harvest controller circuit, a voltage limit controller circuit, a power mode control circuit, a multiplexer circuit, and a switching converter circuit. The power harvest controller circuit, including a first PV voltage input, a ceiling reference input, a floor reference input, and a first gate control output. The voltage limit controller circuit, including a first output voltage feedback input, a pulse width reference input, and a second gate control output. The power mode control circuit, including a second output voltage feedback input, a mode reference input, and a mode selection output. The multiplexer circuit, including a first gate control input, a second gate control input, a mode selection input, and a third gate control output. The switching converter circuit, including a second PV voltage input, a third gate control input, and a DC voltage output.

Abstract: A controller circuit for a PV sub-module includes a power harvest controller circuit, a voltage limit controller circuit, a power mode control circuit, a multiplexer circuit, and a switching converter circuit. The power harvest controller circuit, including a first PV voltage input, a ceiling reference input, a floor reference input, and a first gate control output. The voltage limit controller circuit, including a first output voltage feedback input, a pulse width reference input, and a second gate control output. The power mode control circuit, including a second output voltage feedback input, a mode reference input, and a mode selection output. The multiplexer circuit, including a first gate control input, a second gate control input, a mode selection input, and a third gate control output. The switching converter circuit, including a second PV voltage input, a third gate control input, and a DC voltage output.

Abstract: A controller circuit for a PV sub-module includes a power harvest controller circuit, a voltage limit controller circuit, a power mode control circuit, a multiplexer circuit, and a switching converter circuit. The power harvest controller circuit, including a first PV voltage input, a ceiling reference input, a floor reference input, and a first gate control output. The voltage limit controller circuit, including a first output voltage feedback input, a pulse width reference input, and a second gate control output. The power mode control circuit, including a second output voltage feedback input, a mode reference input, and a mode selection output. The multiplexer circuit, including a first gate control input, a second gate control input, a mode selection input, and a third gate control output. The switching converter circuit, including a second PV voltage input, a third gate control input, and a DC voltage output.

Abstract: A controller circuit for a PV sub-module includes a power harvest controller circuit, a voltage limit controller circuit, a power mode control circuit, a multiplexer circuit, and a switching converter circuit. The power harvest controller circuit, including a first PV voltage input, a ceiling reference input, a floor reference input, and a first gate control output. The voltage limit controller circuit, including a first output voltage feedback input, a pulse width reference input, and a second gate control output. The power mode control circuit, including a second output voltage feedback input, a mode reference input, and a mode selection output. The multiplexer circuit, including a first gate control input, a second gate control input, a mode selection input, and a third gate control output. The switching converter circuit, including a second PV voltage input, a third gate control input, and a DC voltage output.

Abstract: A SCSI ID of a SCSI initiator device that has won an arbitration is identified on a SCSI bus and stored in a register at a SCSI device. Subsequently, a SCSI ID of a selected SCSI target device which was selected by the SCSI initiator device is identified on the SCSI bus and compared with the SCSI ID in the register. If the SCSI ID of the selected SCSI target device and the SCSI ID stored in the register are different, a SCSI command from the SCSI initiator device is processed by the selected SCSI target device. If the SCSI ID of the selected SCSI target device and the SCSI ID stored in the register are the same, the selected SCSI target device refrains from processing the SCSI command from the SCSI initiator device.

Abstract: A technique for extending the operating range of a flyforward converter to low input voltages. In one aspect, power converter includes a positive input supply rail and a negative input supply rail. A power converter input voltage is to be applied between the positive and negative input supply rails. A flyback energy transfer element having a flyback input winding and a forward energy transfer element having a forward input winding are also included. The flyback and forward input windings are coupled between the positive and negative input supply rails. Voltage control circuitry coupled to the forward energy transfer element is also included to reduce a voltage across the forward input winding, substantially to zero, when the power converter input voltage falls below a first threshold value.

Abstract: A technique for extending the operating range of a flyforward converter to low input voltages. In one aspect, power converter includes a positive input supply rail and a negative input supply rail. A power converter input voltage is to be applied between the positive and negative input supply rails. A flyback energy transfer element having a first input winding and a forward energy transfer element having a forward input winding are also included. The flyback and forward input windings are coupled between the positive and negative input supply rails. Voltage control circuitry coupled to the forward energy transfer element is also included to reduce a voltage across the forward input winding, substantially to zero, when the power converter input voltage falls below a first threshold value.

Abstract: A peripheral device (which is preferably a disk drive) can automatically collect trace data upon detecting certain error conditions. The peripheral device has the ability to selectively alter the range of state data collected in a trace depending on the error type. Preferably, the device includes a programmable processor executing a control program. A set of trace switches, each enabling a corresponding set of trace points, can be independently set by the control program. An error trace identification table identifies, for each error type, a corresponding set of trace switches. If an error is encountered, the trace switches corresponding to the error type are determined from the table, and the switches are set accordingly. In another invention aspect, a set of trap switches in the device can be set to trap on the occurrence of a specific error type, thereby supporting a more detailed error analysis.

Abstract: A digital subscriber line (DSL) modem for a service area interface, which controls the power of its downstream transmissions to minimize far-end crosstalk (FEXT), is disclosed. The disclosed modem has an interface to a low-attenuation upstream facility, such as fiber optic, and includes a digital transceiver and an analog front end that is coupled to a twisted-pair wire facility in a binder. The modem also includes a memory location for storing the feeder distance between a DSL central office and the service area interface, the service area interface also coupled to a subscriber of the CO-fed communications via twisted-pair wire. Power cutback levels are applied to the downstream transmissions from the modem according to the feeder distance, so that the FEXT on the CO-fed signal is minimized without undue data rate degradation.

Abstract: A technique for extending the operating range of a flyforward converter to low input voltages. In one aspect, power converter includes a positive input supply rail and a negative input supply rail. A power converter input voltage is to be applied between the positive and negative input supply rails. A flyback energy transfer element having a flyback input winding and a forward energy transfer element having a forward input winding are also included. The flyback and forward input windings are coupled between the positive and negative input supply rails. Voltage control circuitry coupled to the forward energy transfer element is also included to reduce a voltage across the forward input winding, substantially to zero, when the power converter input voltage falls below a first threshold value.

Abstract: Systems and methods are described herein for changing the frequency response of a filter, such as a hybrid circuit. One or more tunable components are adjustable to provide the hybrid circuit with a frequency response corresponding to the characteristics of an associated communications network, such as a digital subscriber link.

Abstract: A peripheral device (which is preferably a disk drive) can automatically collect trace data upon detecting certain error conditions. The peripheral device has the ability to selectively alter the range of state data collected in a trace depending on the error type. Preferably, the device includes a programmable processor executing a control program. A set of trace switches, each enabling a corresponding set of trace points, can be independently set by the control program. An error trace identification table identifies, for each error type, a corresponding set of trace switches. If an error is encountered, the trace switches corresponding to the error type are determined from the table, and the switches are set accordingly. In another invention aspect, a set of trap switches in the device can be set to trap on the occurrence of a specific error type, thereby supporting a more detailed error analysis.

Abstract: A pipelined analog-to-digital converter includes a first stage 700 of an analog-to-digital converter having a first resolution. The first stage 700 includes a three capacitor switched capacitor circuit. The analog-to-digital converter further includes one or more subsequent analog-to-digital converter stages 200. The first and subsequent stages 700 and 200 are pipelined together to provide a digital output signal.