Patents by Inventor Richard Hollingsworth

Richard Hollingsworth has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7496840
    Abstract: A schema for a document generation system and a method of generating a document. In one embodiment the schema includes a template root element; a template information element; a data table element; and an instances element. In another embodiment, the method includes generating one or more composition elements. Each composition element is configurable to include a level, and is capable of manifesting itself as a document page, a page-level overlay, or an instance-level, conditional overlay. The method also includes laying composition elements on a rendering surface such that elements with a high level replace elements with a low level; wherein each composition element includes pre-authored formal content.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: February 24, 2009
    Assignee: Wolters Kluwer Financial Services, Inc.
    Inventors: Richard Warren Hailey, Richard Keith Wyman, Scott James Walter, Thomas William Weitzel, Susan Bosl Hollingsworth, Abdias Evangelista-de Lira, Samuel Richard Hollingsworth, Paul John Gunn
  • Patent number: 7472345
    Abstract: A system that may be used to generate documents and for broader uses such as assembling computer-processable components into computer-processable end products. In one form, the system is a document generation system having an assembly facility configured to be coupled to an origination platform; a knowledge base configured to be coupled to the assembly facility and to store objects in an object-relational hierarchy; and a content management system configured to be coupled to the knowledge base, where the content management system is configured to include an object and a rule. The system may be configured to interact with a knowledge base to create a first set of end products, each end product containing an object; apply precedence to the first set of end products; extract rules from the knowledge base; and assemble a second set of documents based upon applying precedence and rules.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: December 30, 2008
    Assignee: Wolters Kluwer Financial Services, Inc.
    Inventors: Richard Warren Hailey, Richard Keith Wyman, Scott James Walter, Thomas William Weitzel, Susan Bosl Hollingsworth, Abdias Evangelista-de Lira, Samuel Richard Hollingsworth, Paul John Gunn
  • Patent number: 7260584
    Abstract: A data structure generation system. The system includes a knowledge base configured to store data structure components as objects in an object-relational hierarchy. Each object is configured to have a precedence, to include one or more rules, and to include content. The knowledge base may be coupled to a data structure assembly facility configured to retrieve one or more cross-referenced data structure components from a database. The one or more data structure components are configured to have a precedence level, and may be processed in a processor to generate a tree having a root node. The tree may be processed beginning at the root node, and objects of low precedence may be overidden with objects of high precedence.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: August 21, 2007
    Assignee: Wolters Kluwer Financial Services, Inc.
    Inventors: Richard Warren Hailey, Richard Keith Wyman, Scott James Walter, Thomas William Weitzel, Susan Bosl Hollingsworth, Abdias Evangelista-de Lira, Samuel Richard Hollingsworth, Paul John Gunn
  • Patent number: 7254188
    Abstract: A method and system for modulating and detecting high datarate symbol communications provides superior performance in channels having a fixed spectral efficiency. A quadrature amplitude modulation (QAM) constellation and an optimized mapping are employed to encode/detect a communications signal and error correction is provided using high speed forward error correction techniques. A log likelihood detection scheme and/or a novel phase detector may be employed to further enhance performance.
    Type: Grant
    Filed: December 16, 2003
    Date of Patent: August 7, 2007
    Assignee: Comtech EF Data
    Inventors: Richard Hollingsworth Cannon, Richard Macmillan Miller
  • Patent number: 7213042
    Abstract: A digital Intermediate Frequency (IF) processing block including a decimation filter having Finite Impulse Response (FIR) decimation stages provides improved performance over a Hogenauer decimating filter. The filter comprises multiple integrator stages followed by multiple FIR decimating stages. The zeros of the filter are tunable by adjusting the integer coefficients of the FIR stages providing tunability of the cut-off response, as opposed to the fixed sinc response of the Hogenauer filter. As a result, the number of required stages for a particular steepness is reduced, dramatically reducing the amount of digital circuitry required to implement a particular filter design. The improved filter is especially suitable for use in digital IF stages in receivers, and for code-based applications where selectable decimation rate is desired and a fast multiply is not available.
    Type: Grant
    Filed: October 11, 2005
    Date of Patent: May 1, 2007
    Assignee: Comtech EF Data, Inc.
    Inventor: Richard Hollingsworth Cannon
  • Patent number: 7117235
    Abstract: A digital decimation filter having Finite Impulse Response (FIR) decimation stages provides improved performance over a Hogenauer decimating filter. The filter comprises multiple integrator stages followed by multiple FIR decimating stages. The zeros of the filter are tunable by adjusting the integer coefficients of the FIR stages providing tunability of the cut-off response, as opposed to the fixed sinc response of the Hogenauer filter. As a result, the number of required stages for a particular steepness is reduced, dramatically reducing the amount of digital circuitry required to implement a particular filter design. The improved filter is especially suitable for use in digital intermediate frequency (IF) stages in receivers, and for code-based applications where selectable decimation rate is desired and a fast multiply is not available.
    Type: Grant
    Filed: November 6, 2002
    Date of Patent: October 3, 2006
    Assignee: Comtech EF Data
    Inventor: Richard Hollingsworth Cannon
  • Publication number: 20040088343
    Abstract: A digital decimation filter having FIR decimation stages provides improved performance over a Hogenauer decimating filter. The filter comprises multiple integrator stages followed by multiple FIR decimating stages. The zeros of the filter are tunable by adjusting the integer coefficients of the FIR stages providing tunability of the cut-off response, as opposed to the fixed sinc response of the Hogenauer filter. As a result, the number of required stages for a particular steepness is reduced, dramatically reducing the amount of digital circuitry required to implement a particular filter design. The improved filter is especially suitable for use in digital IF stages in receivers, and for code-based applications where selectable decimation rate is desired and a fast multiply is not available.
    Type: Application
    Filed: November 6, 2002
    Publication date: May 6, 2004
    Inventor: Richard Hollingsworth Cannon