Abstract: A method and apparatus to operate a paged memory system which uses only a single, predetermined address per page as a memory-mapped address. When the single memory-mapped address is accessed repeatedly by an unusual sequence, a sequence detector changes the currently addressed page of memory to a new page. The unusual sequence is a normally absurd sequence of READs to a single unchanged address location. Because the unusual sequence only uses the predetermined address and not the data stored therein, the address location is usable as a normal RAM location for all other operations. Such a method and apparatus permits an expansion of the memory space in an electronic data system where there are a fixed number lines in the address bus and where the electronic data system is already using the maximum number of addresses which can be accessed by the address bus in one cycle.

Abstract: A data processing network having a host computer, a plurality of terminals, a cable for transmitting data between the host computer and the terminals, and a controller for controlling character data sent from the host computer to the terminals and keystroke data sent from the terminals to the host computer. Data is transmitted in a cycle of time frames, with each time frame having a plurality of time slots, one time slot being allocated to the transmission of one character from the host computer to a designated terminal. Further, each time frame includes a time slot for the transmission of a keystroke from a designated terminal to the host computer. The terminal which may transmit a keystroke to the host computer is designated in a syn/poll character generated at the beginning of each time frame by the controller.

Abstract: A video display controller for controlling the display of characters stored in a bit plane memory. The characters to be displayed are arranged in the bit plane memory in a set number of scan lines with a set number of data bits in each scan line. Attribute bits are included in one scan line of data bits in each character to be displayed. The controller includes a data bus for receiving data from the bit memory plane in bytes, each of which includes data bits of one scan line. Each data byte from the data bus is clocked into a shift register, with the data byte shifted out of the shift register sequentially, one bit at a time. Attribute bytes are selected from the data bus and an attribute logic circuit applies the attribute bits to the sequential data bits of a corresponding character to be displayed.

Abstract: A new, multi-user data communication system is presented which is inexpensive and does not require any hardware changes to the central processor/system host. The standard serial data input/output port of each terminal is adapted from the standard single-user configuration to a party line, multi-user configuration by the addition of a simple and inexpensive interface circuit within each terminal. After the interface circuits are installed, the terminals can be interconnected to each other and to the central processor/system host using standard serial cabling. The party line interface circuit allows each terminal to access the non-busy serial data bus on a first-come-first-served basis. An interference detector and interference handling circuit are provided also to prevent data errors in the event of a possible data collision.

Abstract: In a data processing network using time slot protocol to transmit characters from a host computer to a plurality of users and to transmit a keystroke from a specified user back to the host computer, a terminal device for generating a first link flow control command in a designated time slot for stopping the transmission of characters which are being transmitted from the host computer to the terminal device at a rate faster than the rate at which they are first being outputted by the terminal device. The terminal device generates the link flow control command responsive to storing a first set number of characters received from the host computer. The terminal device further generates a second link flow control command for restarting the transmission to it of characters after it has outputted sufficient characters such that a number of characters less than or equal to a second set number is stored.

Abstract: A device and method for providing a smooth scroll of a display on a cathode ray tube display device having a display area, horizontal deflecting means receiving horizontal drive pulses for effecting horizontal scans, vertical deflecting means receiving vertical drive pulses for moving said video display vertically, and a video input for receiving a video input signal. The device includes a microprocessor having an input and an output. The microprocessor counts, and places on its output, digital signals corresponding to its count. A digital-to-analog converter converts the digital signals to an analog signal. A summing device is connected between the digital-to-analog converter output and the vertical deflecting means of the cathode ray tube display device for summing a vertical deflection pulse and the analog signal output of said digital-to-analog converter, thereby vertically displacing the video input signal of the cathode ray tube display device.