Patents by Inventor Richard J. Gurak

Richard J. Gurak has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4981371
    Abstract: An integrated I/O interface for a communication terminal, connectable with an external analog communication device and with an external digital communication device, includes an I/O interface subsystem having analog and digital arrays, a first connector for connecting the I/O interface subsystem to a digital processor for the terminal, and a second connector for connecting the I/O interface subsystem to both the analog communication device and the digital communication device. The digital array and the analog array including a CODEC are mounted on a platform carrier on the I/O interface subsystem board. The second connector is a single connector having pins for transmitting the analog signals, pins for the digital signals, a pin indicating whether the analog or digital mode is selected, and a pin indicating which external communication device is selected. The second connector also has common EMI and EMP protective filter circuits incorporated therein to protect the I/O interface subsystem.
    Type: Grant
    Filed: February 17, 1989
    Date of Patent: January 1, 1991
    Assignee: ITT Corporation
    Inventors: Richard J. Gurak, Robert Goeb
  • Patent number: 4368357
    Abstract: A secure communications system provides a non-secure bypass circuit, which circuit is in parallel with a scrambler or other device. The scrambler is operative during a secure mode to convert data or voice signals into scrambled signals. During a plain text mode, the bypass circuit is operative to directly transmit unscrambled data to the communications channel. The bypass circuit includes monitoring means which are operative to monitor the status of the bypass circuit during a secure mode to assure that there is no leakage of unscrambled information during the secure mode. To accomplish this, the bypass circuit operates in conjunction with analog gates, each of which receives an AC voltage indicative of the plain text signal, simultaneously with a DC status voltage, which voltage is monitored at each gate location to provide an output signal when any gate is not disabled during a secure mode.
    Type: Grant
    Filed: November 14, 1980
    Date of Patent: January 11, 1983
    Assignee: International Telephone and Telegraph Corporation
    Inventor: Richard J. Gurak