Abstract: A neuromodulation therapy is delivered via at least one electrode implanted subcutaneously and superficially to a fascia layer superficial to a nerve of a patient. In one example, an implantable medical device is deployed along a superficial surface of a deep fascia tissue layer superficial to a nerve of a patient. Electrical stimulation energy is delivered to the nerve through the deep fascia tissue layer via implantable medical device electrodes.

Abstract: A neuromodulation therapy is delivered via at least one electrode implanted subcutaneously and superficially to a fascia layer superficial to a nerve of a patient. In one example, an implantable medical device is deployed along a superficial surface of a deep fascia tissue layer superficial to a nerve of a patient. Electrical stimulation energy is delivered to the nerve through the deep fascia tissue layer via implantable medical device electrodes.

Abstract: Herein is provided a growth structure for forming a free-standing layer of crystalline material having at least one crystallographic symmetry. The growth structure includes a host substrate and a separation layer disposed on the host substrate for growth of a layer of the crystalline material thereon. The separation layer has a separation layer thickness, and is mechanically weaker than the host substrate and the crystalline material. An array of apertures is in the separation layer, each aperture extending through the separation layer thickness.

Abstract: Herein is provided a growth structure for forming a free-standing layer of crystalline material having at least one crystallographic symmetry. The growth structure includes a host substrate and a separation layer disposed on the host substrate for growth of a layer of the crystalline material thereon. The separation layer has a separation layer thickness, and is mechanically weaker than the host substrate and the crystalline material. An array of apertures is in the separation layer, each aperture extending through the separation layer thickness.

Abstract: A particle detection system that images and detects particles in a fluid flow stream through use of detector array(s) is described. The detection system may include light source arrays that may selectively illuminate a particle in a fluid stream. The detection system may also include a detector array employing smart binning to read the measured signals. The smart binning of the detector array may be achieved through knowledge of an exact particle location provided by a position sensitive detector. The detector array(s) may be low cost based on intelligence built into the system. This particle detection system may be particularly useful for detection and discrimination of different particle types since the read-out of the particle signals can be accomplished with low noise and can be flexible enough to optimize the read out measurements for each particle. The particle detection system may be used, for example, in early warning contamination detection systems and manufacturing processes.

Abstract: A particle detection system that images and detects particles in a fluid flow stream through use of detector array(s) is described. The detection system may include light source arrays that may selectively illuminate a particle in a fluid stream. The detection system may also include a detector array employing smart binning to read the measured signals. The smart binning of the detector array may be achieved through knowledge of an exact particle location provided by a position sensitive detector. The detector array(s) may be low cost based on intelligence built into the system. This particle detection system may be particularly useful for detection and discrimination of different particle types since the read-out of the particle signals can be accomplished with low noise and can be flexible enough to optimize the read out measurements for each particle. The particle detection system may be used, for example, in early warning contamination detection systems and manufacturing processes.

Abstract: A system for loading upgraded, that is, new boot code and/or main firm ware has a programmable memory that has two boot code regions. One of the regions holds the active boot code while the other region holds the inactive boot code. During a boot code upgrade, the boot code in the inactive region, is under control of the boot code in the active region, replaced with the new boot code. Once the replacement process is verified as having been successful and the vector table in the new boot code is copied to the processor vector table in the memory, the processor can be reset so that the new boot code becomes the active boot code and the previously active boot code becomes the inactive boot code.

Abstract: A system for loading upgraded, that is, new boot code and/or main firm ware has a programmable memory that has two boot code regions. One of the regions holds the active boot code while the other region holds the inactive boot code. During a boot code upgrade, the boot code in the inactive region, is under control of the boot code in the active region, replaced with the new boot code. Once the replacement process is verified as having been successful and the vector table in the new boot code is copied to the processor vector table in the memory, the processor can be reset so that the new boot code becomes the active boot code and the previously active boot code becomes the inactive boot code.

Abstract: Provided is a method for producing a nitride layer on a growth substrate. First a pretreatment layer is formed on the growth substrate, and then the formed pretreatment layer is exposed to a gaseous environment that is thermochemically reactive with the pretreatment layer. After gaseous environment exposure of the pretreatment layer, there is carried out an epitaxial growing process to produce on the substrate a nitride layer material defined as In.sub.x Ga.sub.y Al.sub.1-x-y N, where 0.ltoreq.x.ltoreq.1; 0.ltoreq.y.ltoreq.1; and 0.ltoreq.x+y.ltoreq.1. For example, a pretreatment layer of ZnO can be deposited on a sapphire growth substrate and then subjected to a gaseous environment, e.g., including HCl- and/or NH.sub.3 -containing gas, that is thermochemically reactive with the ZnO. Then an epitaxial layer of GaN can be grown by a hydride vapor phase epitaxial process on the pretreated substrate.

Abstract: A digital implementation for a carrier detector. The detector determines if the carrier frequency at any instant is within a predetermined frequency band. The detector further determines if the detected frequency remains within the predetermined frequency band for a predetermined period of time. The detector also provides an indication that there has not been any loss of carrier for another predetermined period of time.

Abstract: An epitaxial growth system comprises a housing around an epitaxial growth chamber. A substrate support is located within the growth chamber. A gallium source introduces gallium into the growth chamber and directs the gallium towards the substrate. An activated nitrogen source introduces activated nitrogen into the growth chamber and directs the activated nitrogen towards the substrate. The activated nitrogen comprises ionic nitrogen species and atomic nitrogen species. An external magnet and/or an exit aperture control the amount of atomic nitrogen species and ionic nitrogen species reaching the substrate.

Abstract: An epitaxial growth system comprises a housing around an epitaxial growth chamber. A substrate support is located within the growth chamber. A gallium source introduces gallium into the growth chamber and directs the gallium towards the substrate. An activated nitrogen source introduces activated nitrogen into the growth chamber and directs the activated nitrogen towards the substrate. The activated nitrogen comprises ionic nitrogen species and atomic nitrogen species. An external magnet and/or an exit aperture control the amount of atomic nitrogen species and ionic nitrogen species reaching the substrate.

Abstract: Digital supervisory and diagnostic circuitry to provide a watchdog function and a low voltage detect function and diagnostics for those functions. The watchdog function has a high immunity to EMI and RFI disturbances and may be enabled or disabled as necessary. An indication is provided of the cause of the last reset so that a reset due to EMI can be distinguished from a reset due to a power failure. The low voltage detect circuitry is implementable in an integrated circuit chip. The low voltage detect circuitry eliminates oscillations from the reset signal and provides a delay which is programmable by the user. The circuitry is designed so that the length of the delay can never be zero.

Abstract: A sigma-delta technique is used to generate a digital representation of the incoming analog signal amplitude. The integration stage of the converter holds an analog error term relative to the ratio of an incoming analog input signal to a reference voltage. The incoming analog signal is disconnected at the end of the conversion. The error term is monitored through a comparator as charge packets are applied to the input of the integration stage. The number of charge packets needed to have the error term cross zero provides information which can be used to extend the resolution of the analog to digital converter.

Abstract: A process and apparatus for shadowing memory uses a single memory chip which is addressable into an address field which is smaller than the memory chip. A program having a main control portion is programmed into a main memory area of the memory chip and is directly connected to a main address space of the address field. The program also includes a plurality of secondary program portions which can be used one at a time with the main control portion of the program. Each of the secondary program portions is stored in a separate secondary and shadowed memory area of the memory chip. A secondary address space of the address field which is large enough to accommodate only one secondary memory area at a time, is controlled so as to be latched to only one secondary memory area at a time. Latching is achieved through higher bits of address locations in a selected portion of the address field.

Abstract: A device which is a combination of a method and apparatus and a filter, such as but not limited to, a conventional lag filter for digitally processing and filtering signals used in industrial control applications. The method and apparatus provides a factor which is used by the filter to process the digital signal at the input to the device. The method determines if the change in the input signal is either due to noise or a valid signal change. Information which gives a past analysis of the trend in direction of the signal at the input to the device is used in the method. The trend information includes a factor representative of the past history of the trend. The method uses the most recent trend indicator to determine to a reasonable degree of confidence if the signal currently at the input to the device is or is not characteristic of noise. If the signal at the input is not believed to be characteristic of noise, then the method adjusts the trend indicator by a tracking credit.

Abstract: The characteristics of the field process system controlled by a self tuning controller are obtained by analyzing the open loop response of the process variable to a step applied at the controller's control output. A first-order system response with pure time delay is used to approximate a higher-order field process system's actual response. The overall deadtime and time constant of the first-order approximation are determined. The maximum slope of the process variable response to the step is stored along with an assigned time of its occurrence and an assigned process variable. The stored information is used to approximate the overall deadtime. In one embodiment the stored information is assumed to be the data obtained from a second-order response having a 10:1 time constant ratio and is used to find the assumed second-order time constants which are used to find the first-order time constant.

Abstract: An input circuit for conditioning a control signal having a variety of waveforms and voltage levels, comprises a pair of input terminals having a metal oxide varistor connected thereacross. One terminal is connected to the base of a transistor thru a resistor, the emitter of the transistor driving an opto-coupler for isolating the control signal from a micro-processor which receives the control signal over an inverter having a schmitt trigger input.