Abstract: A four-terminal integrated circuit high-frequency RF amplifier connects to external circuitry via a ground terminal, and RF input terminal, an RF output terminal and a DC biasing terminal. A two stage amplification architecture is employed--a current gain transistor (common-emitter) is cascoded with a subsequent voltage gain transistor (common-base) while yet maintaining RF signal inversion overall from input to output so as to increase stability. A biasing current-mirror transistor provides biasing current to the current-gain transistor. A fourth transistor connected as a forward-biased collector-base shorted diode between the current mirror biasing transistor and a common external biasing terminal supplies bias current to the current-mirror biasing transistor while simultaneously minimizing voltage swings across the current-gain transistor.

Abstract: A memory device is provided for an integrated injection logic (I.sup.2 L) device in solid state form by a resistor connected at one end to the logic device, and a diode having its cathode connected to the other end of the resistor at a programming junction, and its anode connected to a common point. If the diode conductors are melted or deformed by reverse diode current from the programming junction to the common point, a low impedance path is formed, and the logic portion is provided with a first logic input. If the diode conductors are left unmelted or intact, the logic portion is provided with a second logic input.